From 24ec397f45608421ecd257ac615b1b5bbb50cba2 Mon Sep 17 00:00:00 2001 From: sapthagiri padmanabhan Date: Wed, 30 Sep 2026 10:10:27 +0000 Subject: [PATCH 1/2] pal: expand API comments for platform-specific hooks - Expand exerciser PAL API comments for RP PIO disable, poison forwarding, BAR external-abort setup, and firmware-first MEFN support. Signed-off-by: sapthagiri padmanabhan Change-Id: Iab31f47dfb097450ce02e97407ca82074720c989 --- pal/baremetal/target/RDN2/src/pal_exerciser.c | 57 ++++++++++++++----- pal/baremetal/target/RDN2/src/pal_sbsa.c | 13 ++++- pal/baremetal/target/RDV3/src/pal_exerciser.c | 57 ++++++++++++++----- pal/baremetal/target/RDV3/src/pal_sbsa.c | 13 ++++- .../target/RDV3CFG1/src/pal_exerciser.c | 57 ++++++++++++++----- pal/baremetal/target/RDV3CFG1/src/pal_sbsa.c | 13 ++++- test_pool/exerciser/e029.c | 5 ++ 7 files changed, 161 insertions(+), 54 deletions(-) diff --git a/pal/baremetal/target/RDN2/src/pal_exerciser.c b/pal/baremetal/target/RDN2/src/pal_exerciser.c index f4be7775..a70a9efc 100644 --- a/pal/baremetal/target/RDN2/src/pal_exerciser.c +++ b/pal/baremetal/target/RDN2/src/pal_exerciser.c @@ -750,9 +750,16 @@ uint32_t pal_exerciser_get_data(EXERCISER_DATA_TYPE Type, exerciser_data_t *Data } /** - @brief This API disables the RP-PIO register support of the RP - @param type - RP BDF of which the RP-PIO needs to be disabled - @return None + @brief Disable Root Port PIO error-register support for the specified Root Port. + + ACS calls this before validating that DPC RP Extensions are disabled. The PAL + should clear or mask the platform-specific control that exposes Root Port PIO + error registers while preserving unrelated DPC/AER state. Platforms that do + not expose RP PIO controls may implement this as a no-op. + + @param bdf BDF of the Root Port whose RP PIO support must be disabled. + + @return None. **/ void pal_exerciser_disable_rp_pio_register(uint32_t bdf) @@ -763,9 +770,15 @@ pal_exerciser_disable_rp_pio_register(uint32_t bdf) } /** - @brief This API checks if forwarding poison data forwarding is supported or not - @return status - 1 if poison data forwarding is supported - 0 if poison data forwarding is not supported + @brief Report whether poisoned data is forwarded to the PCIe RAS recording node. + + ACS enables exerciser poison mode separately. This API only reports whether a + poisoned BAR read can propagate through the platform to the RAS-compliant node + used for PCIe error recording. + + @return 1 when poisoned data forwarding is supported for the exerciser path. + @return 0 when poison is blocked, consumed, converted, or cannot be guaranteed + to reach the RAS recording node. **/ uint32_t pal_exerciser_check_poison_data_forwarding_support() @@ -811,11 +824,18 @@ pal_exerciser_get_ras_status(uint32_t ras_node, uint32_t bdf, uint32_t rp_bdf) } /** - @brief This API ensures that an external abort is obtained when MMIO soace is targeted - with reads - @param bdf - BDF of the device - @return status - 0 if implemented, else - - PAL_STATUS_NOT_IMPLEMENTED + @brief Configure BAR access behavior so ACS observes an external abort. + + The PAL must apply platform-specific setup so that a later ACS read from the + saved exerciser BAR address, after memory-space access is disabled, raises a + synchronous external abort or SError instead of completing normally. + + @param bdf BDF of the exerciser whose BAR access is used by the test. + + @return 0 on successful configuration. + @return PAL_STATUS_NOT_IMPLEMENTED when the platform cannot provide this + behavior. + @return Any other non-zero value for a configuration failure. **/ uint32_t pal_exerciser_set_bar_response(uint32_t bdf) @@ -825,10 +845,17 @@ pal_exerciser_set_bar_response(uint32_t bdf) } /** - @brief This API ensures that system implements firmware-first handling of memory - error notifications with reads - @return status - 0 if supported, else - - PAL_STATUS_NOT_IMPLEMENTED + @brief Report whether firmware-first handling of CXL MEFN VDMs is enabled. + + The PAL must inspect platform firmware/RAS configuration and return success + only when generated CXL Memory Error Fault Notification VDMs are expected to + be handled by firmware and surfaced through the platform error-notification + path visible to ACS. + + @return 0 when firmware-first handling is supported and enabled. + @return PAL_STATUS_NOT_IMPLEMENTED when the PAL cannot perform the check. + @return Any other non-zero value when the platform is known not to support the + required firmware-first handling. **/ uint32_t pal_exerciser_check_firmware_handle_support(void) diff --git a/pal/baremetal/target/RDN2/src/pal_sbsa.c b/pal/baremetal/target/RDN2/src/pal_sbsa.c index 37ef82eb..fdfbbf3a 100644 --- a/pal/baremetal/target/RDN2/src/pal_sbsa.c +++ b/pal/baremetal/target/RDN2/src/pal_sbsa.c @@ -47,11 +47,18 @@ pal_get_platform_time_us(void) /** SMMU API's **/ /** - @brief Platform defined method to check if CATU is behind an ETR device + @brief Check whether the specified ETR trace path is protected by a CATU. - @param etr_path full path of ETR device + ACS calls this when an ETR named component is not found behind an SMMU in + IOVIRT. The PAL must use platform trace topology data to decide whether the + ETR identified by etr_path has CATU coverage before trace writes reach memory. - @return 0 - Success, PAL_STATUS_NOT_IMPLEMENTED - API not implemented, Other values - Failure + @param etr_path Full ACPI namespace path of the ETR device being checked. + + @return 0 when that ETR is behind a CATU. + @return PAL_STATUS_NOT_IMPLEMENTED when the check is not implemented. + @return Any other non-zero value when no suitable CATU is present or the + topology check fails. **/ uint32_t pal_smmu_is_etr_behind_catu(char *etr_path) diff --git a/pal/baremetal/target/RDV3/src/pal_exerciser.c b/pal/baremetal/target/RDV3/src/pal_exerciser.c index 1e1f51c5..bae77508 100644 --- a/pal/baremetal/target/RDV3/src/pal_exerciser.c +++ b/pal/baremetal/target/RDV3/src/pal_exerciser.c @@ -748,9 +748,16 @@ uint32_t pal_exerciser_get_data(EXERCISER_DATA_TYPE Type, exerciser_data_t *Data } /** - @brief This API disables the RP-PIO register support of the RP - @param type - RP BDF of which the RP-PIO needs to be disabled - @return None + @brief Disable Root Port PIO error-register support for the specified Root Port. + + ACS calls this before validating that DPC RP Extensions are disabled. The PAL + should clear or mask the platform-specific control that exposes Root Port PIO + error registers while preserving unrelated DPC/AER state. Platforms that do + not expose RP PIO controls may implement this as a no-op. + + @param bdf BDF of the Root Port whose RP PIO support must be disabled. + + @return None. **/ void pal_exerciser_disable_rp_pio_register(uint32_t bdf) @@ -761,9 +768,15 @@ pal_exerciser_disable_rp_pio_register(uint32_t bdf) } /** - @brief This API checks if forwarding poison data forwarding is supported or not - @return status - 1 if poison data forwarding is supported - 0 if poison data forwarding is not supported + @brief Report whether poisoned data is forwarded to the PCIe RAS recording node. + + ACS enables exerciser poison mode separately. This API only reports whether a + poisoned BAR read can propagate through the platform to the RAS-compliant node + used for PCIe error recording. + + @return 1 when poisoned data forwarding is supported for the exerciser path. + @return 0 when poison is blocked, consumed, converted, or cannot be guaranteed + to reach the RAS recording node. **/ uint32_t pal_exerciser_check_poison_data_forwarding_support() @@ -809,11 +822,18 @@ pal_exerciser_get_ras_status(uint32_t ras_node, uint32_t bdf, uint32_t rp_bdf) } /** - @brief This API ensures that an external abort is obtained when MMIO soace is targeted - with reads - @param bdf - BDF of the device - @return status - 0 if implemented, else - - PAL_STATUS_NOT_IMPLEMENTED + @brief Configure BAR access behavior so ACS observes an external abort. + + The PAL must apply platform-specific setup so that a later ACS read from the + saved exerciser BAR address, after memory-space access is disabled, raises a + synchronous external abort or SError instead of completing normally. + + @param bdf BDF of the exerciser whose BAR access is used by the test. + + @return 0 on successful configuration. + @return PAL_STATUS_NOT_IMPLEMENTED when the platform cannot provide this + behavior. + @return Any other non-zero value for a configuration failure. **/ uint32_t pal_exerciser_set_bar_response(uint32_t bdf) @@ -823,10 +843,17 @@ pal_exerciser_set_bar_response(uint32_t bdf) } /** - @brief This API ensures that system implements firmware-first handling of memory - error notifications with reads - @return status - 0 if supported, else - - PAL_STATUS_NOT_IMPLEMENTED + @brief Report whether firmware-first handling of CXL MEFN VDMs is enabled. + + The PAL must inspect platform firmware/RAS configuration and return success + only when generated CXL Memory Error Fault Notification VDMs are expected to + be handled by firmware and surfaced through the platform error-notification + path visible to ACS. + + @return 0 when firmware-first handling is supported and enabled. + @return PAL_STATUS_NOT_IMPLEMENTED when the PAL cannot perform the check. + @return Any other non-zero value when the platform is known not to support the + required firmware-first handling. **/ uint32_t pal_exerciser_check_firmware_handle_support(void) diff --git a/pal/baremetal/target/RDV3/src/pal_sbsa.c b/pal/baremetal/target/RDV3/src/pal_sbsa.c index 53466361..0ada8062 100644 --- a/pal/baremetal/target/RDV3/src/pal_sbsa.c +++ b/pal/baremetal/target/RDV3/src/pal_sbsa.c @@ -47,11 +47,18 @@ pal_get_platform_time_us(void) /** SMMU API's **/ /** - @brief Platform defined method to check if CATU is behind an ETR device + @brief Check whether the specified ETR trace path is protected by a CATU. - @param etr_path full path of ETR device + ACS calls this when an ETR named component is not found behind an SMMU in + IOVIRT. The PAL must use platform trace topology data to decide whether the + ETR identified by etr_path has CATU coverage before trace writes reach memory. - @return 0 - Success, PAL_STATUS_NOT_IMPLEMENTED - API not implemented, Other values - Failure + @param etr_path Full ACPI namespace path of the ETR device being checked. + + @return 0 when that ETR is behind a CATU. + @return PAL_STATUS_NOT_IMPLEMENTED when the check is not implemented. + @return Any other non-zero value when no suitable CATU is present or the + topology check fails. **/ uint32_t pal_smmu_is_etr_behind_catu(char *etr_path) diff --git a/pal/baremetal/target/RDV3CFG1/src/pal_exerciser.c b/pal/baremetal/target/RDV3CFG1/src/pal_exerciser.c index 1e1f51c5..bae77508 100644 --- a/pal/baremetal/target/RDV3CFG1/src/pal_exerciser.c +++ b/pal/baremetal/target/RDV3CFG1/src/pal_exerciser.c @@ -748,9 +748,16 @@ uint32_t pal_exerciser_get_data(EXERCISER_DATA_TYPE Type, exerciser_data_t *Data } /** - @brief This API disables the RP-PIO register support of the RP - @param type - RP BDF of which the RP-PIO needs to be disabled - @return None + @brief Disable Root Port PIO error-register support for the specified Root Port. + + ACS calls this before validating that DPC RP Extensions are disabled. The PAL + should clear or mask the platform-specific control that exposes Root Port PIO + error registers while preserving unrelated DPC/AER state. Platforms that do + not expose RP PIO controls may implement this as a no-op. + + @param bdf BDF of the Root Port whose RP PIO support must be disabled. + + @return None. **/ void pal_exerciser_disable_rp_pio_register(uint32_t bdf) @@ -761,9 +768,15 @@ pal_exerciser_disable_rp_pio_register(uint32_t bdf) } /** - @brief This API checks if forwarding poison data forwarding is supported or not - @return status - 1 if poison data forwarding is supported - 0 if poison data forwarding is not supported + @brief Report whether poisoned data is forwarded to the PCIe RAS recording node. + + ACS enables exerciser poison mode separately. This API only reports whether a + poisoned BAR read can propagate through the platform to the RAS-compliant node + used for PCIe error recording. + + @return 1 when poisoned data forwarding is supported for the exerciser path. + @return 0 when poison is blocked, consumed, converted, or cannot be guaranteed + to reach the RAS recording node. **/ uint32_t pal_exerciser_check_poison_data_forwarding_support() @@ -809,11 +822,18 @@ pal_exerciser_get_ras_status(uint32_t ras_node, uint32_t bdf, uint32_t rp_bdf) } /** - @brief This API ensures that an external abort is obtained when MMIO soace is targeted - with reads - @param bdf - BDF of the device - @return status - 0 if implemented, else - - PAL_STATUS_NOT_IMPLEMENTED + @brief Configure BAR access behavior so ACS observes an external abort. + + The PAL must apply platform-specific setup so that a later ACS read from the + saved exerciser BAR address, after memory-space access is disabled, raises a + synchronous external abort or SError instead of completing normally. + + @param bdf BDF of the exerciser whose BAR access is used by the test. + + @return 0 on successful configuration. + @return PAL_STATUS_NOT_IMPLEMENTED when the platform cannot provide this + behavior. + @return Any other non-zero value for a configuration failure. **/ uint32_t pal_exerciser_set_bar_response(uint32_t bdf) @@ -823,10 +843,17 @@ pal_exerciser_set_bar_response(uint32_t bdf) } /** - @brief This API ensures that system implements firmware-first handling of memory - error notifications with reads - @return status - 0 if supported, else - - PAL_STATUS_NOT_IMPLEMENTED + @brief Report whether firmware-first handling of CXL MEFN VDMs is enabled. + + The PAL must inspect platform firmware/RAS configuration and return success + only when generated CXL Memory Error Fault Notification VDMs are expected to + be handled by firmware and surfaced through the platform error-notification + path visible to ACS. + + @return 0 when firmware-first handling is supported and enabled. + @return PAL_STATUS_NOT_IMPLEMENTED when the PAL cannot perform the check. + @return Any other non-zero value when the platform is known not to support the + required firmware-first handling. **/ uint32_t pal_exerciser_check_firmware_handle_support(void) diff --git a/pal/baremetal/target/RDV3CFG1/src/pal_sbsa.c b/pal/baremetal/target/RDV3CFG1/src/pal_sbsa.c index 53466361..0ada8062 100644 --- a/pal/baremetal/target/RDV3CFG1/src/pal_sbsa.c +++ b/pal/baremetal/target/RDV3CFG1/src/pal_sbsa.c @@ -47,11 +47,18 @@ pal_get_platform_time_us(void) /** SMMU API's **/ /** - @brief Platform defined method to check if CATU is behind an ETR device + @brief Check whether the specified ETR trace path is protected by a CATU. - @param etr_path full path of ETR device + ACS calls this when an ETR named component is not found behind an SMMU in + IOVIRT. The PAL must use platform trace topology data to decide whether the + ETR identified by etr_path has CATU coverage before trace writes reach memory. - @return 0 - Success, PAL_STATUS_NOT_IMPLEMENTED - API not implemented, Other values - Failure + @param etr_path Full ACPI namespace path of the ETR device being checked. + + @return 0 when that ETR is behind a CATU. + @return PAL_STATUS_NOT_IMPLEMENTED when the check is not implemented. + @return Any other non-zero value when no suitable CATU is present or the + topology check fails. **/ uint32_t pal_smmu_is_etr_behind_catu(char *etr_path) diff --git a/test_pool/exerciser/e029.c b/test_pool/exerciser/e029.c index c40197c2..961c3d62 100644 --- a/test_pool/exerciser/e029.c +++ b/test_pool/exerciser/e029.c @@ -98,6 +98,11 @@ payload() val_print(DEBUG, "\n Skipping for bdf %x", e_bdf); val_set_status(pe_index, RESULT_SKIP(01)); return; + } else if (status) { + val_print(ERROR, "\n Failed to configure BAR response for BDF %x", e_bdf); + test_skip = 0; + fail_cnt++; + continue; } ras_node = val_exerciser_get_pcie_ras_compliant_err_node(e_bdf, erp_bdf); From 9c50a9f82d06621b5d12fcec53da932cd9a30f72 Mon Sep 17 00:00:00 2001 From: sapthagiri padmanabhan Date: Wed, 30 Sep 2026 08:59:05 +0000 Subject: [PATCH 2/2] smmu: make SMMU PAL callbacks Linux-specific - Guard only the VAL-to-PAL transition in acs_smmu.c. - Return ACS_STATUS_PAL_NOT_IMPLEMENTED for non-Linux targets. - Remove unused baremetal and UEFI placeholder implementations. - Remove these callbacks from tools/scripts/functions.json so non-Linux ports are not required to implement them. Signed-off-by: sapthagiri padmanabhan Change-Id: Icc0965b1a90a4bc05ee50cadecc330791b8bb30b --- pal/baremetal/target/RDN2/src/pal_bsa.c | 48 --------------------- pal/baremetal/target/RDV3/src/pal_bsa.c | 48 --------------------- pal/baremetal/target/RDV3CFG1/src/pal_bsa.c | 48 --------------------- pal/uefi_acpi/src/pal_smmu.c | 32 -------------- pal/uefi_dt/src/pal_smmu.c | 33 -------------- tools/scripts/functions.json | 15 ------- val/include/pal_interface.h | 2 + val/src/acs_smmu.c | 20 +++++++-- val/src/bsa_execute_test.c | 2 +- 9 files changed, 19 insertions(+), 229 deletions(-) diff --git a/pal/baremetal/target/RDN2/src/pal_bsa.c b/pal/baremetal/target/RDN2/src/pal_bsa.c index 6e45c992..96dbf734 100644 --- a/pal/baremetal/target/RDN2/src/pal_bsa.c +++ b/pal/baremetal/target/RDN2/src/pal_bsa.c @@ -646,54 +646,6 @@ pal_gic_free_irq ( return; } -/** SMMU PAL PAI's **/ -#define SMMU_V3_IDR1 0x4 -#define SMMU_V3_IDR1_PASID_SHIFT 6 -#define SMMU_V3_IDR1_PASID_MASK 0x1f - -/** - @brief Check if input address is within the IOVA translation range for the device - @param port - Pointer to the DMA port - @param dma_addr - The input address to be checked - - @return - - 0 : Success - - PAL_STATUS_NOT_IMPLEMENTED : Feature not implemented - - non-zero : Failure (implementation-specific error code) -**/ -uint32_t pal_smmu_check_device_iova(void *port, uint64_t dma_addr) -{ - (void) port; - (void) dma_addr; - - pal_warn_not_implemented(__func__); - return PAL_STATUS_NOT_IMPLEMENTED; -} - -/** - @brief Start monitoring an IO virtual address coming from DMA port - @param port - Pointer to the DMA port - @return None -**/ -void pal_smmu_device_start_monitor_iova(void *port) -{ - (void) port; - - return; -} - -/** - @brief Stop monitoring an IO virtual address coming from DMA port - @param port - Pointer to the DMA port - @return None -**/ -void pal_smmu_device_stop_monitor_iova(void *port) -{ - (void) port; - - return; -} - /** PCIe PAL API's */ /** diff --git a/pal/baremetal/target/RDV3/src/pal_bsa.c b/pal/baremetal/target/RDV3/src/pal_bsa.c index 7b714321..2d4eee7f 100644 --- a/pal/baremetal/target/RDV3/src/pal_bsa.c +++ b/pal/baremetal/target/RDV3/src/pal_bsa.c @@ -675,54 +675,6 @@ pal_gic_free_irq ( return; } -/** SMMU PAL PAI's **/ -#define SMMU_V3_IDR1 0x4 -#define SMMU_V3_IDR1_PASID_SHIFT 6 -#define SMMU_V3_IDR1_PASID_MASK 0x1f - -/** - @brief Check if input address is within the IOVA translation range for the device - @param port - Pointer to the DMA port - @param dma_addr - The input address to be checked - - @return - - 0 : Success - - PAL_STATUS_NOT_IMPLEMENTED : Feature not implemented - - non-zero : Failure (implementation-specific error code) -**/ -uint32_t pal_smmu_check_device_iova(void *port, uint64_t dma_addr) -{ - (void) port; - (void) dma_addr; - - pal_warn_not_implemented(__func__); - return PAL_STATUS_NOT_IMPLEMENTED; -} - -/** - @brief Start monitoring an IO virtual address coming from DMA port - @param port - Pointer to the DMA port - @return None -**/ -void pal_smmu_device_start_monitor_iova(void *port) -{ - (void) port; - - return; -} - -/** - @brief Stop monitoring an IO virtual address coming from DMA port - @param port - Pointer to the DMA port - @return None -**/ -void pal_smmu_device_stop_monitor_iova(void *port) -{ - (void) port; - - return; -} - /** PCIe PAL API's */ /** diff --git a/pal/baremetal/target/RDV3CFG1/src/pal_bsa.c b/pal/baremetal/target/RDV3CFG1/src/pal_bsa.c index 5cd38342..5ec01e0a 100644 --- a/pal/baremetal/target/RDV3CFG1/src/pal_bsa.c +++ b/pal/baremetal/target/RDV3CFG1/src/pal_bsa.c @@ -675,54 +675,6 @@ pal_gic_free_irq ( return; } -/** SMMU PAL PAI's **/ -#define SMMU_V3_IDR1 0x4 -#define SMMU_V3_IDR1_PASID_SHIFT 6 -#define SMMU_V3_IDR1_PASID_MASK 0x1f - -/** - @brief Check if input address is within the IOVA translation range for the device - @param port - Pointer to the DMA port - @param dma_addr - The input address to be checked - - @return - - 0 : Success - - PAL_STATUS_NOT_IMPLEMENTED : Feature not implemented - - non-zero : Failure (implementation-specific error code) -**/ -uint32_t pal_smmu_check_device_iova(void *port, uint64_t dma_addr) -{ - (void) port; - (void) dma_addr; - - pal_warn_not_implemented(__func__); - return PAL_STATUS_NOT_IMPLEMENTED; -} - -/** - @brief Start monitoring an IO virtual address coming from DMA port - @param port - Pointer to the DMA port - @return None -**/ -void pal_smmu_device_start_monitor_iova(void *port) -{ - (void) port; - - return; -} - -/** - @brief Stop monitoring an IO virtual address coming from DMA port - @param port - Pointer to the DMA port - @return None -**/ -void pal_smmu_device_stop_monitor_iova(void *port) -{ - (void) port; - - return; -} - /** PCIe PAL API's */ /** diff --git a/pal/uefi_acpi/src/pal_smmu.c b/pal/uefi_acpi/src/pal_smmu.c index 6d381534..bcda6ab9 100644 --- a/pal/uefi_acpi/src/pal_smmu.c +++ b/pal/uefi_acpi/src/pal_smmu.c @@ -17,35 +17,3 @@ /* This is a place-holder file. Need to be implemented if needed in later releases */ #include "pal_uefi.h" -/** - @brief Begin monitoring DMA IOVAs for a device port -**/ -VOID -pal_smmu_device_start_monitor_iova(VOID *port) -{ - (void)port; - pal_warn_not_implemented(__func__); -} - -/** - @brief Stop monitoring DMA IOVAs for a device port -**/ -VOID -pal_smmu_device_stop_monitor_iova(VOID *port) -{ - (void)port; - pal_warn_not_implemented(__func__); -} - -/** - @brief Check if a DMA address is present in the SMMU IOVA table - @return PAL_STATUS_NOT_IMPLEMENTED to signal lack of support on UEFI PAL -**/ -UINT32 -pal_smmu_check_device_iova(VOID *port, UINT64 dma_addr) -{ - (void)port; - (void)dma_addr; - pal_warn_not_implemented(__func__); - return PAL_STATUS_NOT_IMPLEMENTED; -} diff --git a/pal/uefi_dt/src/pal_smmu.c b/pal/uefi_dt/src/pal_smmu.c index 6c973613..c6b82516 100644 --- a/pal/uefi_dt/src/pal_smmu.c +++ b/pal/uefi_dt/src/pal_smmu.c @@ -18,36 +18,3 @@ #include "pal_uefi.h" /* This is a place-holder file. Need to be implemented if needed in later releases */ - -/** - @brief Begin monitoring DMA IOVAs for a device port -**/ -VOID -pal_smmu_device_start_monitor_iova(VOID *port) -{ - (void)port; - pal_warn_not_implemented(__func__); -} - -/** - @brief Stop monitoring DMA IOVAs for a device port -**/ -VOID -pal_smmu_device_stop_monitor_iova(VOID *port) -{ - (void)port; - pal_warn_not_implemented(__func__); -} - -/** - @brief Check if a DMA address is present in the SMMU IOVA table - @return PAL_STATUS_NOT_IMPLEMENTED to signal lack of support on UEFI PAL -**/ -UINT32 -pal_smmu_check_device_iova(VOID *port, UINT64 dma_addr) -{ - (void)port; - (void)dma_addr; - pal_warn_not_implemented(__func__); - return PAL_STATUS_NOT_IMPLEMENTED; -} diff --git a/tools/scripts/functions.json b/tools/scripts/functions.json index 88e0dd09..9ba9af55 100644 --- a/tools/scripts/functions.json +++ b/tools/scripts/functions.json @@ -65,21 +65,6 @@ "function_name": "pal_mmu_get_mapping_count", "parameters": [] }, - { - "return_type": "uint32_t", - "function_name": "pal_smmu_check_device_iova", - "parameters": ["void *port", "uint64_t dma_addr"] - }, - { - "return_type": "void", - "function_name": "pal_smmu_device_start_monitor_iova", - "parameters": ["void *port"] - }, - { - "return_type": "void", - "function_name": "pal_smmu_device_stop_monitor_iova", - "parameters": ["void *port"] - }, { "return_type": "uint32_t", "function_name": "pal_pcie_p2p_support", diff --git a/val/include/pal_interface.h b/val/include/pal_interface.h index 23fae485..b31363ec 100644 --- a/val/include/pal_interface.h +++ b/val/include/pal_interface.h @@ -610,9 +610,11 @@ typedef struct { } memory_region_descriptor_t; void pal_smmu_create_info_table(SMMU_INFO_TABLE *smmu_info_table); +#ifdef TARGET_LINUX uint32_t pal_smmu_check_device_iova(void *port, uint64_t dma_addr); void pal_smmu_device_start_monitor_iova(void *port); void pal_smmu_device_stop_monitor_iova(void *port); +#endif /** Peripheral Tests related definitions **/ diff --git a/val/src/acs_smmu.c b/val/src/acs_smmu.c index bc1610c5..9842d672 100644 --- a/val/src/acs_smmu.c +++ b/val/src/acs_smmu.c @@ -64,9 +64,14 @@ val_smmu_start_monitor_dev(uint32_t ctrl_index) return ACS_STATUS_ERR; } +#ifdef TARGET_LINUX pal_smmu_device_start_monitor_iova(ap); return 0; +#else + /* PAL implementation is Linux-only. */ + return ACS_STATUS_PAL_NOT_IMPLEMENTED; +#endif } /** @@ -88,9 +93,14 @@ val_smmu_stop_monitor_dev(uint32_t ctrl_index) return ACS_STATUS_ERR; } +#ifdef TARGET_LINUX pal_smmu_device_stop_monitor_iova(ap); return 0; +#else + /* PAL implementation is Linux-only. */ + return ACS_STATUS_PAL_NOT_IMPLEMENTED; +#endif } @@ -110,7 +120,6 @@ static uint32_t val_smmu_check_device_iova(uint32_t ctrl_index, addr_t dma_addr) { void *ap = NULL; - uint32_t status; ap = (void *)val_dma_get_info(DMA_PORT_INFO, ctrl_index); if (ap == NULL) { @@ -119,9 +128,12 @@ val_smmu_check_device_iova(uint32_t ctrl_index, addr_t dma_addr) } val_print(DEBUG, "\n Input dma addr = %lx", dma_addr); - status = pal_smmu_check_device_iova(ap, dma_addr); - - return status; +#ifdef TARGET_LINUX + return pal_smmu_check_device_iova(ap, dma_addr); +#else + /* PAL implementation is Linux-only. */ + return ACS_STATUS_PAL_NOT_IMPLEMENTED; +#endif } /** diff --git a/val/src/bsa_execute_test.c b/val/src/bsa_execute_test.c index 8c21f9a6..40bdaa10 100644 --- a/val/src/bsa_execute_test.c +++ b/val/src/bsa_execute_test.c @@ -503,10 +503,10 @@ val_bsa_pcie_execute_tests(uint32_t num_pe, uint32_t *g_sw_view) #if defined(TARGET_LINUX) || defined(TARGET_BAREMETAL) status |= p045_entry(num_pe); status |= p094_entry(num_pe); - status |= p095_entry(num_pe); status |= p097_entry(num_pe); #endif #if defined(TARGET_LINUX) + status |= p095_entry(num_pe); status |= p105_entry(num_pe); #endif #ifndef TARGET_LINUX