diff --git a/C910_RTL_FACTORY/gen_rtl/cpu/rtl/ct_top.v b/C910_RTL_FACTORY/gen_rtl/cpu/rtl/ct_top.v index fa057823..86056b85 100644 --- a/C910_RTL_FACTORY/gen_rtl/cpu/rtl/ct_top.v +++ b/C910_RTL_FACTORY/gen_rtl/cpu/rtl/ct_top.v @@ -670,11 +670,11 @@ wire mmu_lsu_tlb_busy; wire mmu_lsu_tlb_inv_done; wire [11 :0] mmu_lsu_tlb_wakeup; wire mmu_pmp_fetch3; -wire [27 :0] mmu_pmp_pa0; -wire [27 :0] mmu_pmp_pa1; -wire [27 :0] mmu_pmp_pa2; -wire [27 :0] mmu_pmp_pa3; -wire [27 :0] mmu_pmp_pa4; +wire [28 :0] mmu_pmp_pa0; +wire [28 :0] mmu_pmp_pa1; +wire [28 :0] mmu_pmp_pa2; +wire [28 :0] mmu_pmp_pa3; +wire [28 :0] mmu_pmp_pa4; wire mmu_rst_b; wire mmu_xx_mmu_en; wire mmu_yy_xx_no_op; @@ -2029,4 +2029,3 @@ ct_clk_top x_ct_clk_top ( endmodule - diff --git a/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_dutlb.v b/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_dutlb.v index 4b65824f..149d22b8 100644 --- a/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_dutlb.v +++ b/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_dutlb.v @@ -176,8 +176,8 @@ output mmu_lsu_stall0; output mmu_lsu_stall1; output mmu_lsu_tlb_busy; output [11:0] mmu_lsu_tlb_wakeup; -output [27:0] mmu_pmp_pa0; -output [27:0] mmu_pmp_pa1; +output [28:0] mmu_pmp_pa0; +output [28:0] mmu_pmp_pa1; output [27:0] mmu_sysmap_pa0; output [27:0] mmu_sysmap_pa1; @@ -415,8 +415,8 @@ wire mmu_lsu_stall0; wire mmu_lsu_stall1; wire mmu_lsu_tlb_busy; wire [11:0] mmu_lsu_tlb_wakeup; -wire [27:0] mmu_pmp_pa0; -wire [27:0] mmu_pmp_pa1; +wire [28:0] mmu_pmp_pa0; +wire [28:0] mmu_pmp_pa1; wire [27:0] mmu_sysmap_pa0; wire [27:0] mmu_sysmap_pa1; wire pad_yy_icg_scan_en; @@ -1539,4 +1539,3 @@ assign dutlb_ptw_wfc = dutlb_wfc; // &ModuleEnd; @451 endmodule - diff --git a/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_dutlb_read.v b/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_dutlb_read.v index 39858790..f172037f 100644 --- a/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_dutlb_read.v +++ b/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_dutlb_read.v @@ -251,7 +251,7 @@ output mmu_lsu_sec_x; output mmu_lsu_sh_x; output mmu_lsu_so_x; output mmu_lsu_stall_x; -output [27:0] mmu_pmp_pa_x; +output [28:0] mmu_pmp_pa_x; output [27:0] mmu_sysmap_pa_x; output [26:0] utlb_req_vpn_x; @@ -398,7 +398,7 @@ wire mmu_lsu_sec_x; wire mmu_lsu_sh_x; wire mmu_lsu_so_x; wire mmu_lsu_stall_x; -wire [27:0] mmu_pmp_pa_x; +wire [28:0] mmu_pmp_pa_x; wire [27:0] mmu_sysmap_pa_x; wire [17:0] pa_offset; wire pabuf_clk; @@ -769,7 +769,7 @@ end assign dutlb_va_chg_x = lsu_va_chg; -assign mmu_pmp_pa_x[PPN_WIDTH-1:0] = dutlb_pa_buf[PPN_WIDTH-1:0]; +assign mmu_pmp_pa_x[PPN_WIDTH:0] = {dutlb_pa_buf[PPN_WIDTH-1:0], lsu_mmu_va_x[11]}; assign utlb_req_vpn_x[VPN_WIDTH-1:0] = lsu_mmu_va_x[VPN_WIDTH+11:12]; @@ -777,5 +777,3 @@ assign mmu_sysmap_pa_x[PPN_WIDTH-1:0] = lsu_mmu_va_x[VPN_WIDTH+12:12]; // &ModuleEnd; @337 endmodule - - diff --git a/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_iutlb.v b/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_iutlb.v index 6ebe80fc..effd923c 100644 --- a/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_iutlb.v +++ b/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_iutlb.v @@ -104,7 +104,7 @@ output [27:0] mmu_ifu_pa; output mmu_ifu_pavld; output mmu_ifu_pgflt; output mmu_ifu_sec; -output [27:0] mmu_pmp_pa2; +output [28:0] mmu_pmp_pa2; output [27:0] mmu_sysmap_pa2; // &Regs; @29 @@ -457,7 +457,7 @@ wire [27:0] mmu_ifu_pa; wire mmu_ifu_pavld; wire mmu_ifu_pgflt; wire mmu_ifu_sec; -wire [27:0] mmu_pmp_pa2; +wire [28:0] mmu_pmp_pa2; wire [27:0] mmu_sysmap_pa2; wire [27:0] pa_fin; wire [26:0] pa_offset; @@ -2285,7 +2285,7 @@ begin iutlb_pa_buf[PPN_WIDTH-1:0] <= iutlb_pa_aft_bypass[PPN_WIDTH-1:0]; end -assign mmu_pmp_pa2[PPN_WIDTH-1:0] = iutlb_pa_buf[PPN_WIDTH-1:0]; +assign mmu_pmp_pa2[PPN_WIDTH:0] = {iutlb_pa_buf[PPN_WIDTH-1:0], ifu_mmu_va[11]}; //---------------------------------------------------------- @@ -2336,5 +2336,3 @@ assign iutlb_ptw_wfc = iutlb_wfc; // &ModuleEnd; @899 endmodule - - diff --git a/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_jtlb.v b/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_jtlb.v index cf05561b..ac80e15c 100644 --- a/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_jtlb.v +++ b/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_jtlb.v @@ -212,7 +212,7 @@ output mmu_lsu_pa2_err; output mmu_lsu_pa2_vld; output mmu_lsu_sec2; output mmu_lsu_share2; -output [27 :0] mmu_pmp_pa4; +output [28 :0] mmu_pmp_pa4; output [27 :0] mmu_sysmap_pa4; // &Regs; @28 @@ -389,7 +389,7 @@ wire mmu_lsu_pa2_err; wire mmu_lsu_pa2_vld; wire mmu_lsu_sec2; wire mmu_lsu_share2; -wire [27 :0] mmu_pmp_pa4; +wire [28 :0] mmu_pmp_pa4; wire [27 :0] mmu_sysmap_pa4; wire [26 :0] pa_offset; wire pad_yy_icg_scan_en; @@ -1407,7 +1407,7 @@ assign jtlb_arb_pfu_cmplt = (pfu_ok_st || pfu_deny_st) && !pfu_off_chk; assign jtlb_arb_pfu_vpn[VPN_WIDTH-1:0] = lsu_mmu_va2[VPN_WIDTH-1:0]; // addr to pmp -assign mmu_pmp_pa4[PPN_WIDTH-1:0] = pfu_pa_buf[PPN_WIDTH-1:0]; +assign mmu_pmp_pa4[PPN_WIDTH:0] = {pfu_pa_buf[PPN_WIDTH-1:0], 1'b0}; // addr to sysmap assign mmu_sysmap_pa4[PPN_WIDTH-1:0] = lsu_mmu_va2[PPN_WIDTH-1:0]; @@ -1452,5 +1452,3 @@ assign jtlb_top_utlb_pavld = tc_pa_vld || ptw_jtlb_ref_data_vld; // &ModuleEnd; @1071 endmodule - - diff --git a/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_ptw.v b/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_ptw.v index aa36ec28..f6a3052a 100644 --- a/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_ptw.v +++ b/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_ptw.v @@ -105,7 +105,7 @@ output mmu_lsu_data_req; output [39:0] mmu_lsu_data_req_addr; output mmu_lsu_data_req_size; output mmu_pmp_fetch3; -output [27:0] mmu_pmp_pa3; +output [28:0] mmu_pmp_pa3; output [27:0] mmu_sysmap_pa3; output [3 :0] ptw_arb_bank_sel; output [41:0] ptw_arb_data_din; @@ -172,7 +172,7 @@ wire mmu_lsu_data_req; wire [39:0] mmu_lsu_data_req_addr; wire mmu_lsu_data_req_size; wire mmu_pmp_fetch3; -wire [27:0] mmu_pmp_pa3; +wire [28:0] mmu_pmp_pa3; wire [27:0] mmu_sysmap_pa3; wire pad_yy_icg_scan_en; wire [3 :0] pmp_mmu_flg3; @@ -752,7 +752,7 @@ assign mmu_sysmap_pa3[PPN_WIDTH-1:0] = ptw_req_addr[PPN_WIDTH+11:12]; //========================================================== // Interface to PMP //========================================================== -assign mmu_pmp_pa3[PPN_WIDTH-1:0] = ptw_req_addr[PPN_WIDTH+11:12]; +assign mmu_pmp_pa3[PPN_WIDTH:0] = {ptw_req_addr[PPN_WIDTH+11:12], ptw_req_addr[11]}; assign mmu_pmp_fetch3 = ptw_fetch_type; @@ -803,4 +803,3 @@ assign ptw_top_imiss = ptw_fetch_type; // &ModuleEnd; @554 endmodule - diff --git a/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_top.v b/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_top.v index e63b7bea..3e2f6a4c 100644 --- a/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_top.v +++ b/C910_RTL_FACTORY/gen_rtl/mmu/rtl/ct_mmu_top.v @@ -233,11 +233,11 @@ output mmu_lsu_tlb_busy; output mmu_lsu_tlb_inv_done; output [11:0] mmu_lsu_tlb_wakeup; output mmu_pmp_fetch3; -output [27:0] mmu_pmp_pa0; -output [27:0] mmu_pmp_pa1; -output [27:0] mmu_pmp_pa2; -output [27:0] mmu_pmp_pa3; -output [27:0] mmu_pmp_pa4; +output [28:0] mmu_pmp_pa0; +output [28:0] mmu_pmp_pa1; +output [28:0] mmu_pmp_pa2; +output [28:0] mmu_pmp_pa3; +output [28:0] mmu_pmp_pa4; output mmu_xx_mmu_en; output mmu_yy_xx_no_op; @@ -416,11 +416,11 @@ wire mmu_lsu_tlb_busy; wire mmu_lsu_tlb_inv_done; wire [11:0] mmu_lsu_tlb_wakeup; wire mmu_pmp_fetch3; -wire [27:0] mmu_pmp_pa0; -wire [27:0] mmu_pmp_pa1; -wire [27:0] mmu_pmp_pa2; -wire [27:0] mmu_pmp_pa3; -wire [27:0] mmu_pmp_pa4; +wire [28:0] mmu_pmp_pa0; +wire [28:0] mmu_pmp_pa1; +wire [28:0] mmu_pmp_pa2; +wire [28:0] mmu_pmp_pa3; +wire [28:0] mmu_pmp_pa4; wire [27:0] mmu_sysmap_pa0; wire [27:0] mmu_sysmap_pa1; wire [27:0] mmu_sysmap_pa2; @@ -1131,4 +1131,3 @@ assign mmu_had_debug_info[33:0] = {iutlb_top_ref_cur_st[1:0], endmodule - diff --git a/C910_RTL_FACTORY/gen_rtl/pmp/rtl/ct_pmp_acc.v b/C910_RTL_FACTORY/gen_rtl/pmp/rtl/ct_pmp_acc.v index bc004461..f242fcc7 100644 --- a/C910_RTL_FACTORY/gen_rtl/pmp/rtl/ct_pmp_acc.v +++ b/C910_RTL_FACTORY/gen_rtl/pmp/rtl/ct_pmp_acc.v @@ -33,7 +33,7 @@ module ct_pmp_acc( // &Ports; @25 input [1 :0] cp0_pmp_mpp; input [1 :0] cur_priv_mode; -input [27:0] mmu_pmp_pa_y; +input [28:0] mmu_pmp_pa_y; input pmp_mprv_status_y; input [28:0] pmpaddr0_value; input [28:0] pmpaddr1_value; @@ -79,7 +79,7 @@ wire mmu_addr_ge_upaddr4; wire mmu_addr_ge_upaddr5; wire mmu_addr_ge_upaddr6; wire mmu_addr_ge_upaddr7; -wire [27:0] mmu_pmp_pa_y; +wire [28:0] mmu_pmp_pa_y; wire [3 :0] pmp_default_flg; wire [15:0] pmp_hit; wire pmp_mmu_hit0; @@ -303,4 +303,3 @@ end // &ModuleEnd; @168 endmodule - diff --git a/C910_RTL_FACTORY/gen_rtl/pmp/rtl/ct_pmp_comp_hit.v b/C910_RTL_FACTORY/gen_rtl/pmp/rtl/ct_pmp_comp_hit.v index 5aa62547..bb624d91 100644 --- a/C910_RTL_FACTORY/gen_rtl/pmp/rtl/ct_pmp_comp_hit.v +++ b/C910_RTL_FACTORY/gen_rtl/pmp/rtl/ct_pmp_comp_hit.v @@ -24,7 +24,7 @@ module ct_pmp_comp_hit( // &Ports; @25 input [1 :0] addr_match_mode_x; input mmu_addr_ge_bottom_x; -input [27:0] mmu_pmp_pa_y; +input [28:0] mmu_pmp_pa_y; input [28:0] pmpaddr_x_value; output mmu_addr_ge_upaddr_x; output pmp_mmu_hit_x; @@ -38,10 +38,10 @@ wire [1 :0] addr_match_mode_x; wire mmu_addr_ge_bottom_x; wire mmu_addr_ge_upaddr_x; wire mmu_addr_ls_top; -wire [28:0] mmu_comp_adder; +wire [29:0] mmu_comp_adder; wire mmu_na4_addr_match; wire mmu_napot_addr_match; -wire [27:0] mmu_pmp_pa_y; +wire [28:0] mmu_pmp_pa_y; wire mmu_tor_addr_match; wire [28:0] pmpaddr_x_value; @@ -72,16 +72,17 @@ end //1. TOR mode : pmpaddr_x_value[i-1]<= addr < pmpaddr_x_value[i] -assign mmu_comp_adder[ADDR_WIDTH:0] = {1'b0,mmu_pmp_pa_y[ADDR_WIDTH-1:0]} - - {1'b0,pmpaddr_x_value[ADDR_WIDTH:1]}; -assign mmu_addr_ls_top = mmu_comp_adder[ADDR_WIDTH]; +assign mmu_comp_adder[29:0] = {1'b0,mmu_pmp_pa_y[28:0]} - + {1'b0,pmpaddr_x_value[28:0]}; +assign mmu_addr_ls_top = mmu_comp_adder[29]; assign mmu_tor_addr_match = mmu_addr_ge_bottom_x && mmu_addr_ls_top; // for next entry -assign mmu_addr_ge_upaddr_x = !mmu_comp_adder[ADDR_WIDTH]; +assign mmu_addr_ge_upaddr_x = !mmu_comp_adder[29]; //2. NAPOT : addr &addr_mask == pmpaddr_x_value & addr_mask -assign mmu_napot_addr_match = (addr_mask[ADDR_WIDTH-1:0] & mmu_pmp_pa_y[ADDR_WIDTH-1:0]) == (addr_mask[ADDR_WIDTH-1:0] & pmpaddr_x_value[ADDR_WIDTH:1]); +assign mmu_napot_addr_match = (addr_mask[ADDR_WIDTH-1:0] & mmu_pmp_pa_y[28:1]) == + (addr_mask[ADDR_WIDTH-1:0] & pmpaddr_x_value[28:1]); //assign mmu_napot_addr_match = (addr_mask[ADDR_WIDTH-1:0] & mmu_pmp_pa_y[ADDR_WIDTH-1:0]) == pmpaddr_x_value[ADDR_WIDTH:1]; //3. NA4 : addr[31:2] == pmpaddr_x_value[29:0] @@ -133,4 +134,3 @@ end // &ModuleEnd; @104 endmodule - diff --git a/C910_RTL_FACTORY/gen_rtl/pmp/rtl/ct_pmp_top.v b/C910_RTL_FACTORY/gen_rtl/pmp/rtl/ct_pmp_top.v index ff76ceb1..0a133e8a 100644 --- a/C910_RTL_FACTORY/gen_rtl/pmp/rtl/ct_pmp_top.v +++ b/C910_RTL_FACTORY/gen_rtl/pmp/rtl/ct_pmp_top.v @@ -48,11 +48,11 @@ input [1 :0] cp0_yy_priv_mode; input cpurst_b; input forever_cpuclk; input mmu_pmp_fetch3; -input [27:0] mmu_pmp_pa0; -input [27:0] mmu_pmp_pa1; -input [27:0] mmu_pmp_pa2; -input [27:0] mmu_pmp_pa3; -input [27:0] mmu_pmp_pa4; +input [28:0] mmu_pmp_pa0; +input [28:0] mmu_pmp_pa1; +input [28:0] mmu_pmp_pa2; +input [28:0] mmu_pmp_pa3; +input [28:0] mmu_pmp_pa4; input pad_yy_icg_scan_en; output [63:0] pmp_cp0_data; output [3 :0] pmp_mmu_flg0; @@ -77,11 +77,11 @@ wire cpurst_b; wire [1 :0] cur_priv_mode; wire forever_cpuclk; wire mmu_pmp_fetch3; -wire [27:0] mmu_pmp_pa0; -wire [27:0] mmu_pmp_pa1; -wire [27:0] mmu_pmp_pa2; -wire [27:0] mmu_pmp_pa3; -wire [27:0] mmu_pmp_pa4; +wire [28:0] mmu_pmp_pa0; +wire [28:0] mmu_pmp_pa1; +wire [28:0] mmu_pmp_pa2; +wire [28:0] mmu_pmp_pa3; +wire [28:0] mmu_pmp_pa4; wire pad_yy_icg_scan_en; wire [63:0] pmp_cp0_data; wire [17:0] pmp_csr_sel; @@ -341,4 +341,3 @@ ct_pmp_acc x_ct_pmp_acc4 ( // &ModuleEnd; @170 endmodule -