diff --git a/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml b/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml index a27f4314e0387..69daba3d1664c 100644 --- a/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml +++ b/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml @@ -39,7 +39,9 @@ properties: - const: apple,t8142-cluster-cpufreq - const: apple,t8152-cluster-cpufreq - items: - - const: apple,t6020-cluster-cpufreq + - enum: + - apple,t6020-cluster-cpufreq + - apple,t6041-cluster-cpufreq - const: apple,t8112-cluster-cpufreq reg: @@ -54,8 +56,9 @@ properties: items: - items: - description: PMP report region - - description: Cluster lane (0 for E, 1 for P on T8140) - enum: [0, 1] + - description: Cluster lane (0 for E, 1 for P on T8140; 0 for + E, 1 for P0, 2 for P1 on T6041) + enum: [0, 1, 2] '#performance-domain-cells': const: 0 diff --git a/Documentation/devicetree/bindings/display/apple,dcp.yaml b/Documentation/devicetree/bindings/display/apple,dcp.yaml index a7c74d948e6e9..7b1e5eb547648 100644 --- a/Documentation/devicetree/bindings/display/apple,dcp.yaml +++ b/Documentation/devicetree/bindings/display/apple,dcp.yaml @@ -23,6 +23,7 @@ properties: - apple,t8112-dcp - apple,t6000-dcp - apple,t6020-dcp + - apple,t6041-dcp - apple,t8140-dcp - apple,t8142-dcp - const: apple,dcp diff --git a/Documentation/devicetree/bindings/iommu/apple,sart.yaml b/Documentation/devicetree/bindings/iommu/apple,sart.yaml index 472454c3d24d6..f32fd61905c77 100644 --- a/Documentation/devicetree/bindings/iommu/apple,sart.yaml +++ b/Documentation/devicetree/bindings/iommu/apple,sart.yaml @@ -32,6 +32,7 @@ properties: - items: - enum: - apple,t6020-sart + - apple,t6041-sart - apple,t8112-sart - apple,t8122-sart - apple,t8140-sart diff --git a/Documentation/devicetree/bindings/soc/apple/apple,dockchannel.yaml b/Documentation/devicetree/bindings/soc/apple/apple,dockchannel.yaml index a3362df34e148..0c22efbf04643 100644 --- a/Documentation/devicetree/bindings/soc/apple/apple,dockchannel.yaml +++ b/Documentation/devicetree/bindings/soc/apple/apple,dockchannel.yaml @@ -25,6 +25,7 @@ properties: - apple,t6020-dockchannel - apple,t6030-dockchannel - apple,t6031-dockchannel + - apple,t6041-dockchannel - apple,t8112-dockchannel - apple,t8122-dockchannel - apple,t8140-dockchannel diff --git a/Documentation/devicetree/bindings/soc/apple/apple,rtk-helper-asc4.yaml b/Documentation/devicetree/bindings/soc/apple/apple,rtk-helper-asc4.yaml index da78694e37466..ac5a5fa0b329f 100644 --- a/Documentation/devicetree/bindings/soc/apple/apple,rtk-helper-asc4.yaml +++ b/Documentation/devicetree/bindings/soc/apple/apple,rtk-helper-asc4.yaml @@ -25,6 +25,7 @@ properties: - apple,t6020-mtp - apple,t6030-mtp - apple,t6031-mtp + - apple,t6041-mtp - apple,t8112-mtp - apple,t8122-mtp - apple,t8140-mtp @@ -32,6 +33,7 @@ properties: - enum: - apple,t6020-rtk-helper-asc4 - apple,t6030-rtk-helper-asc4 + - apple,t6041-rtk-helper-asc4 - apple,t8112-rtk-helper-asc4 - apple,t8122-rtk-helper-asc4 - apple,t8140-rtk-helper-asc4 diff --git a/Documentation/devicetree/bindings/spmi/apple,spmi.yaml b/Documentation/devicetree/bindings/spmi/apple,spmi.yaml index f88e21c348667..13f24c3f086c1 100644 --- a/Documentation/devicetree/bindings/spmi/apple,spmi.yaml +++ b/Documentation/devicetree/bindings/spmi/apple,spmi.yaml @@ -22,6 +22,7 @@ properties: - apple,t6020-spmi - apple,t6030-spmi - apple,t6031-spmi + - apple,t6041-spmi - apple,t8012-spmi - apple,t8015-spmi - apple,t8122-spmi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple/Makefile index d15eeeb9ece3f..007e204fdbc56 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -94,6 +94,7 @@ dtb-$(CONFIG_ARCH_APPLE) += t6031-j516c.dtb dtb-$(CONFIG_ARCH_APPLE) += t6032-j575d.dtb dtb-$(CONFIG_ARCH_APPLE) += t6034-j514m.dtb dtb-$(CONFIG_ARCH_APPLE) += t6034-j516m.dtb +dtb-$(CONFIG_ARCH_APPLE) += t6040-j616s.dtb dtb-$(CONFIG_ARCH_APPLE) += t8112-j413.dtb dtb-$(CONFIG_ARCH_APPLE) += t8112-j415.dtb dtb-$(CONFIG_ARCH_APPLE) += t8112-j473.dtb diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts new file mode 100644 index 0000000000000..ee36e3e012cf9 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -0,0 +1,609 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (16-inch, M4 Pro, Nov 2024) + * + * target-type: J616s + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6040.dtsi" +#include +#include +#include + +/ { + compatible = "apple,j616s", "apple,t6040", "apple,arm-platform"; + model = "Apple MacBook Pro (16-inch, M4 Pro, Nov 2024)"; + chassis-type = "laptop"; + + aliases { + keyboard = &keyboard; + wifi0 = "/pcie@1cb0000000/pci@0,0/wifi@0,0"; + bluetooth0 = "/pcie@1cb0000000/pci@0,0/bluetooth@0,1"; + /* used by the loader to hand over the display */ + dcp = &dcp; + disp0 = &display; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer0: framebuffer@0 { + compatible = "apple,simple-framebuffer", "simple-framebuffer"; + reg = <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status = "disabled"; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + /* The loader adds its own reservations */ + + /* + * iBoot loads the ISP firmware below the kernel's memory. Its + * segments are the ADT's isp0 segment-ranges (macOS 26.6.2, + * iBoot mBoot-18000.161.10), mapped where the firmware runs them: + * 0x100_0000_0000 onwards, its 32 MiB main memory. The driver + * checks that the coprocessor's reset vector is this text before + * it starts the firmware. + */ + isp_fw_text: isp-firmware-text@10000c44000 { + reg = <0x100 0x00c44000 0x0 0xca8000>; + iommu-addresses = <&isp 0x100 0x0 0x0 0xca8000>; + no-map; + }; + + isp_fw_data: isp-firmware-data@10001e7c000 { + reg = <0x100 0x01e7c000 0x0 0x1344000>; + iommu-addresses = <&isp 0x100 0xca8000 0x0 0x1344000>; + no-map; + }; + + /* the firmware's main memory, the driver allocates above it */ + isp_heap: isp-heap { + iommu-addresses = <&isp 0x100 0x0 0x0 0x2000000>; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0 0 0 0>; /* To be filled by loader */ + }; + + led-controller { + compatible = "pwm-leds"; + + led-0 { + pwms = <&fpwm0 0 40000>; + label = "apple::kbd_backlight"; + function = LED_FUNCTION_KBD_BACKLIGHT; + color = ; + max-brightness = <255>; + }; + }; + + /* + * CPU die temperature: SMC key TCMz (CPU die max), sensor 0 of + * smc_hwmon. The PMP's fast die-temperature limit regulates (TCMz + * settles near 111 C); this zone is the backstop above it: passive at + * 113 C, critical (orderly shutdown) at 118 C, polled once a second as + * the SMC refreshes TCMz. The cpufreq cooling device sits on a + * cluster's policy CPU, so each map lists every CPU of its cluster. + */ + thermal-zones { + cpu-die-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + thermal-sensors = <&smc_hwmon 0>; /* TCMz */ + + trips { + cpu_die_passive: cpu-die-passive { + temperature = <113000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu-die-critical { + temperature = <118000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-e { + trip = <&cpu_die_passive>; + cooling-device = + <&cpu_e0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map-p0 { + trip = <&cpu_die_passive>; + cooling-device = + <&cpu_p00 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p01 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p02 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p03 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p04 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map-p1 { + trip = <&cpu_die_passive>; + cooling-device = + <&cpu_p10 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p11 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p12 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p13 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p14 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + + /* + * The speaker amps' shared shutdown line (SDZ, AP pin 54, low = + * shutdown). One fixed regulator, the SDZ supply of all six, not + * per-amp shutdown-gpios: with GPIO_SHARED six references become a + * vote, and one amp driving the line low would not shut the other + * five down. + */ + speaker_sdz: regulator-sn012776-sdz { + compatible = "regulator-fixed"; + regulator-name = "sn012776-sdz"; + gpios = <&pinctrl 54 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + /* + * The AOP firmware runs the stream (MCA cluster 0, one serializer for + * all six amps); the J616 variant of macaudio links the AOP audio + * component's speaker back-end (DAI 3) to the amps. The codecs are + * listed in the ADT provider order, so each gets its native playback + * slot (LW1 0, RW1 1, LW2 2, RW2 3, LT 4, RT 5). The idle masks are the + * ADT amp-tx-zd-config rows 0 and 1: LW1 drives zeros in the right + * amps' sense slots, RW1 in the left amps'. + */ + sound: sound { + compatible = "apple,j616-macaudio", "apple,macaudio"; + model = "MacBook Pro J616"; + #address-cells = <1>; + #size-cells = <0>; + + dai-link@0 { + reg = <0>; + link-name = "Speakers"; + dai-tdm-idle-mode-0 = "zero"; + dai-tdm-idle-mode-1 = "zero"; + dai-tdm-slot-tx-idle-mask-0 = <0xf0f0f0>; + dai-tdm-slot-tx-idle-mask-1 = <0x0f0f0f>; + + cpu { + sound-dai = <&aop_audio 3>; + }; + + codec { + sound-dai = <&speaker_left_woof1>, <&speaker_right_woof1>, + <&speaker_left_woof2>, <&speaker_right_woof2>, + <&speaker_left_tweet>, <&speaker_right_tweet>; + }; + }; + }; + + /* + * The headphone jack: the AOP audio component's jack back-end (DAI 4) + * to the CS42L84. A card of its own, so a codec that does not answer + * costs the jack only, never the speakers. + */ + sound_jack: sound-jack { + compatible = "apple,j616-macaudio-jack", "apple,macaudio"; + model = "MacBook Pro J616 Jack"; + #address-cells = <1>; + #size-cells = <0>; + + dai-link@0 { + reg = <0>; + link-name = "Headphone Jack"; + + cpu { + sound-dai = <&aop_audio 4>; + }; + + codec { + sound-dai = <&jack_codec>; + }; + }; + }; +}; + +&cpuidle { + status = "okay"; +}; + +&smc { + status = "okay"; +}; + +&smc_mbox { + status = "okay"; +}; + +&nub_spmi0 { + status = "okay"; +}; + +&pinctrl { + status = "okay"; + + wifi_clkreq: wifi-clkreq { + pinmux = ; + }; +}; + +/* + * The AP takes none of the always-on bank's interrupts: the AOP firmware + * owns some of its pins and interrupt registers, and a chained handler here + * would see their pending bits without a handler of ours. + */ +&pinctrl_nub { + status = "okay"; + /delete-property/ interrupt-controller; + /delete-property/ #interrupt-cells; + /delete-property/ interrupts; +}; + +&fpwm0 { + status = "okay"; +}; + +/* The Type-C retimers (ADT atcrt at 0x18/0x19/0x1a) sit on this bus; no driver yet. */ +&i2c6 { + status = "okay"; +}; + +&mtp { + status = "okay"; +}; + +&mtp_mbox { + status = "okay"; +}; + +&mtp_dart { + status = "okay"; +}; + +&mtp_dockchannel { + status = "okay"; +}; + +&mtp_hid { + multi-touch { + firmware-name = "apple/tpmtfw-j616s.bin"; + }; + + keyboard: keyboard { + hid-country-code = <0>; + apple,keyboard-layout-id = <2>; + }; + + stm { + }; + + actuator { + }; + + tp-accel { + }; + + mtp { + }; +}; + +&smc_hwmon { + /* + * TCMz must stay the first temperature child: the thermal zone names + * the sensor by its index, so the shared hwmon includes below only + * append after it. + */ + temperature-TCMz { + apple,key-id = "TCMz"; + label = "CPU Die Max"; + }; +}; + +/* Read-only fan speeds and more SMC sensors; every key exists on this machine's SMC. */ +#include "hwmon-common.dtsi" +#include "hwmon-fan-dual.dtsi" +#include "hwmon-laptop.dtsi" + +&pcie_dart { + status = "okay"; +}; + +/* + * Wi-Fi and Bluetooth (BCM4388). The boot loader adds the per-unit + * calibration and Bluetooth address to these nodes, and its Bluetooth + * admission depends on this node exactly as it is; it is kept as the + * booted tree has it. + */ +/ { + pcie0: pcie@1cb0000000 { + compatible = "apple,t6041-pcie", "apple,t6020-pcie"; + reg = <0x1c 0xb0000000 0 0x1000000 4 0x14000000 0 0x4000 4 0x10028000 0 0x4000 4 0x17020000 0 0x4000>; + reg-names = "config", "rc", "port0", "phy0"; + ranges = <0x43000000 0xb 0xc0000000 0xb 0xc0000000 0 0x20000000 0x2000000 0 0x80000000 0xb 0x80000000 0 0x40000000>; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_clkreq>; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0 1>; + iommu-map-mask = <0xffff>; + iommu-map = <0x100 &pcie_dart 1 2>; + msi-ranges = <&aic AIC_IRQ 2071 IRQ_TYPE_EDGE_RISING 32>; + msi-parent = <&pcie0>; + msi-controller; + interrupts = <0 0x6bb 4>; + interrupt-parent = <&aic>; + device_type = "pci"; + + port00: pci@0,0 { + compatible = "pciclass,0604"; + reg = <0 0 0 0 0>; + ranges; + interrupt-map = <0 0 0 1 &port00 0 0 0 0 0 0 0 2 &port00 0 0 0 1 0 0 0 3 &port00 0 0 0 2 0 0 0 4 &port00 0 0 0 3>; + interrupt-map-mask = <0 0 0 7>; + #interrupt-cells = <1>; + interrupt-controller; + #size-cells = <2>; + #address-cells = <3>; + pwren-gpios = <&smc_gpio 0x13 0>; + reset-gpios = <&pinctrl 4 1>; + device_type = "pci"; + + bluetooth@0,1 { + compatible = "pci14e4,5f72"; + reg = <0x100 0 0 0 0>; + brcm,board-type = "apple,hostomel"; + status = "okay"; + }; + + wifi@0,0 { + compatible = "brcm,bcm4329-fmac"; + reg = <0 0 0 0 0>; + brcm,ccode-map-trivial; + brcm,board-type = "apple,hostomel"; + }; + }; + }; +}; + +&ans_mbox { + status = "okay"; +}; + +&ans_sart { + status = "okay"; +}; + +&nvme { + status = "okay"; +}; + +&pmp_dart { + status = "okay"; +}; + +&pmp_report { + status = "okay"; +}; + +&pmp { + status = "okay"; +}; + +&pmp_mbox { + status = "okay"; +}; + +&dcp { + panel { + compatible = "apple,panel-j616", "apple,panel-mini-led", "apple,panel"; + width-mm = <345>; + height-mm = <223>; + status = "disabled"; + }; +}; + +&pmc { + status = "okay"; +}; + +&mcc { + status = "okay"; +}; + +&aop { + status = "okay"; +}; + +&aop_mbox { + status = "okay"; +}; + +&aop_dart { + status = "okay"; +}; + +&admac0 { + status = "okay"; +}; + +&admac1 { + status = "okay"; +}; + +&aop_audio { + apple,chassis-name = "J616"; + apple,machine-kind = "MacBook Pro"; +}; + +/* + * The six SN012776 speaker amps, held in hardware shutdown until a sound + * card enables them (ADT /arm-io/i2c1/audio-speaker@38): one interrupt line + * on AP pin 55, level low; sense slots from speaker-config (speaker i at RX + * bytes 4i and 4i + 2, order LW1 RW1 LW2 RW2 LT RT). Names as on the J314 + * and J316, which speakersafetyd's profile uses. Every amp joins the SDZ + * fail-closed group: an over-temperature or over-current fault on any one + * forces the shared shutdown line low. + */ +&i2c1 { + status = "okay"; + + speaker_left_woof1: codec@38 { + compatible = "ti,sn012776", "ti,tas2764"; + reg = <0x38>; + SDZ-supply = <&speaker_sdz>; + apple,sdz-group-fail-closed; + #sound-dai-cells = <0>; + sound-name-prefix = "Left Woofer 1"; + interrupts-extended = <&pinctrl 55 IRQ_TYPE_LEVEL_LOW>; + ti,imon-slot-no = <0>; + ti,vmon-slot-no = <2>; + }; + + speaker_left_woof2: codec@39 { + compatible = "ti,sn012776", "ti,tas2764"; + reg = <0x39>; + SDZ-supply = <&speaker_sdz>; + apple,sdz-group-fail-closed; + #sound-dai-cells = <0>; + sound-name-prefix = "Left Woofer 2"; + interrupts-extended = <&pinctrl 55 IRQ_TYPE_LEVEL_LOW>; + ti,imon-slot-no = <8>; + ti,vmon-slot-no = <10>; + }; + + speaker_left_tweet: codec@3a { + compatible = "ti,sn012776", "ti,tas2764"; + reg = <0x3a>; + SDZ-supply = <&speaker_sdz>; + apple,sdz-group-fail-closed; + #sound-dai-cells = <0>; + sound-name-prefix = "Left Tweeter"; + interrupts-extended = <&pinctrl 55 IRQ_TYPE_LEVEL_LOW>; + ti,imon-slot-no = <16>; + ti,vmon-slot-no = <18>; + }; +}; + +&i2c3 { + status = "okay"; + + speaker_right_woof1: codec@3b { + compatible = "ti,sn012776", "ti,tas2764"; + reg = <0x3b>; + SDZ-supply = <&speaker_sdz>; + apple,sdz-group-fail-closed; + #sound-dai-cells = <0>; + sound-name-prefix = "Right Woofer 1"; + interrupts-extended = <&pinctrl 55 IRQ_TYPE_LEVEL_LOW>; + ti,imon-slot-no = <4>; + ti,vmon-slot-no = <6>; + }; + + speaker_right_woof2: codec@3c { + compatible = "ti,sn012776", "ti,tas2764"; + reg = <0x3c>; + SDZ-supply = <&speaker_sdz>; + apple,sdz-group-fail-closed; + #sound-dai-cells = <0>; + sound-name-prefix = "Right Woofer 2"; + interrupts-extended = <&pinctrl 55 IRQ_TYPE_LEVEL_LOW>; + ti,imon-slot-no = <12>; + ti,vmon-slot-no = <14>; + }; + + speaker_right_tweet: codec@3d { + compatible = "ti,sn012776", "ti,tas2764"; + reg = <0x3d>; + SDZ-supply = <&speaker_sdz>; + apple,sdz-group-fail-closed; + #sound-dai-cells = <0>; + sound-name-prefix = "Right Tweeter"; + interrupts-extended = <&pinctrl 55 IRQ_TYPE_LEVEL_LOW>; + ti,imon-slot-no = <20>; + ti,vmon-slot-no = <22>; + }; +}; + +/* + * The CS42L84 headphone codec (ADT /arm-io/i2c2/audio-codec-output@4B). Its + * reset line is nub GPIO pin 58, driven high to run the codec (the driver's + * "reset" is an enable, as on the J514/J516); its interrupt is AP pin 106, + * level low. The AOP firmware runs the jack's stream on MCA cluster 2. + */ +&i2c2 { + status = "okay"; + + jack_codec: codec@4b { + compatible = "cirrus,cs42l84"; + reg = <0x4b>; + reset-gpios = <&pinctrl_nub 58 GPIO_ACTIVE_HIGH>; + #sound-dai-cells = <0>; + interrupts-extended = <&pinctrl 106 IRQ_TYPE_LEVEL_LOW>; + sound-name-prefix = "Jack"; + }; +}; + +&isp { + memory-region = <&isp_fw_text>, <&isp_fw_data>, <&isp_heap>; + memory-region-names = "text", "data", "heap"; + apple,platform-id = <5>; + /* ADT isp0 cam-connections-scheme */ + apple,cam-connections-scheme = <0x10>; + status = "okay"; + + /* + * The front camera, an IMX958: firmware configuration 5 as the + * firmware reports it. + */ + sensor-presets { + /* 1920x1080 */ + preset0 { + apple,config-index = <5>; + apple,input-size = <1920 2160>; + apple,output-size = <1920 1080>; + apple,crop = <0 0 1920 1080>; + }; + /* 1280x720 */ + preset1 { + apple,config-index = <5>; + apple,input-size = <1920 2160>; + apple,output-size = <1280 720>; + apple,crop = <0 0 1280 720>; + }; + }; +}; + +&isp_dart0 { + status = "okay"; +}; + +&isp_dart1 { + status = "okay"; +}; + +&isp_dart2 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi b/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi new file mode 100644 index 0000000000000..fc0228c236be6 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi @@ -0,0 +1,299 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * PMGR power domains for the Apple T6040 "M4 Pro" SoC + * + * From the J616s ADT /arm-io/pmgr devices and their parents. + * + * Copyright The Asahi Linux Contributors + */ + +&pmgr { + ps_ispsens0: power-controller@0 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ispsens0"; + }; + + ps_apcie_st0: power-controller@108 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x108 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "apcie_st0"; + apple,always-on; + }; + + ps_apcie_st1: power-controller@110 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x110 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "apcie_st1"; + apple,always-on; + }; + + ps_fab3_soc: power-controller@118 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x118 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "fab3_soc"; + power-domains = <&ps_afc>; + apple,always-on; + }; + + ps_sio: power-controller@120 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x120 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "sio"; + power-domains = <&ps_fab3_soc>; + apple,always-on; + }; + + ps_fpwm0: power-controller@138 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x138 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "fpwm0"; + power-domains = <&ps_sio>; + }; + + ps_i2c1: power-controller@158 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x158 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c1"; + power-domains = <&ps_sio>; + }; + + ps_i2c2: power-controller@160 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x160 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c2"; + power-domains = <&ps_sio>; + }; + + ps_i2c3: power-controller@168 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x168 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c3"; + power-domains = <&ps_sio>; + }; + + ps_i2c4: power-controller@170 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x170 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c4"; + power-domains = <&ps_sio>; + }; + + ps_i2c6: power-controller@180 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x180 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c6"; + power-domains = <&ps_sio>; + }; + + ps_i2c8: power-controller@190 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x190 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c8"; + power-domains = <&ps_sio>; + }; + + ps_ans: power-controller@370 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x370 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ans"; + power-domains = <&ps_fab3_soc>; + apple,always-on; + }; + + ps_isp_sys: power-controller@378 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x378 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_sys"; + power-domains = <&ps_fab6_soc>; + }; + + ps_apcie_sys_st0: power-controller@380 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x380 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "apcie_sys_st0"; + power-domains = <&ps_ans>, <&ps_apcie_st0>; + apple,always-on; + }; + + ps_apcie_sys_st1: power-controller@388 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x388 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "apcie_sys_st1"; + power-domains = <&ps_ans>, <&ps_apcie_st1>; + apple,always-on; + }; +}; + +/* + * The ISP's own power states at PMGR +0x4000 (ADT isp0 reg[1]). The ADT + * gives addresses only for ISP_CPU and ISP_FE; the other slots follow + * T8140's order (CPU, FE, DPRX, SECURE, BE, CLR) without the blocks T6040 + * lacks. With only CPU and FE on, the firmware takes an SError while it + * loads its tunables. + */ +&pmgr_isp { + ps_isp_cpu: power-controller@0 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_cpu"; + power-domains = <&ps_isp_sys>; + }; + + ps_isp_fe: power-controller@8 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_fe"; + power-domains = <&ps_isp_sys>; + }; + + ps_isp_dprx: power-controller@10 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x10 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_dprx"; + power-domains = <&ps_isp_fe>; + }; + + ps_isp_secure: power-controller@18 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x18 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_secure"; + power-domains = <&ps_isp_fe>; + }; + + ps_isp_be: power-controller@20 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x20 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_be"; + power-domains = <&ps_isp_fe>; + }; + + ps_isp_clr: power-controller@28 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x28 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_clr"; + power-domains = <&ps_isp_be>; + }; +}; + +&pmgr_aux { + ps_pms: power-controller@100 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x100 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "pms"; + apple,always-on; + }; + + /* fabric parent of isp_sys, on from boot */ + ps_afi: power-controller@110 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x110 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "afi"; + apple,always-on; + }; + + ps_avd_sys: power-controller@170 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x170 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "avd_sys"; + }; + + ps_afc: power-controller@178 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x178 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "afc"; + apple,always-on; + }; + + ps_pmp: power-controller@410 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x410 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "pmp"; + apple,always-on; + }; + + ps_pms_sram: power-controller@418 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x418 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "pms_sram"; + apple,always-on; + }; + + ps_fab6_soc: power-controller@480 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x480 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "fab6_soc"; + power-domains = <&ps_afi>; + apple,always-on; + }; +}; + +&pmgr_mini { + /* ADT pmgr device NUB_GPIO (0x11a), no parent */ + ps_nub_gpio: power-controller@90 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x90 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "nub_gpio"; + apple,always-on; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi new file mode 100644 index 0000000000000..1046aec7d6208 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -0,0 +1,1396 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T6040 "M4 Pro" SoC + * + * Unit addresses are the Apple Device Tree's /arm-io addresses plus the + * 0x2_00000000 arm-io base. The nodes sit at the root, not under a + * simple-bus: the boot loader edits several of them by path. The blocks + * known to need non-posted writes carry nonposted-mmio themselves. + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include +#include +#include + +/ { + #address-cells = <2>; + #size-cells = <2>; + + cpuidle: cpuidle { + compatible = "apple,t6041-cpuidle"; + status = "disabled"; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + /* + * The clusters are MPIDR Aff1, which are also the L2 groups. + * capacity-dmips-mhz comes from pinned single-core throughput + * at the lowest p-state (E 1018 MHz, P 1257 MHz): E/P is 0.652 + * per MHz, so E 668 and P 1024. + */ + cpu-map { + cluster0 { + core0 { + cpu = <&cpu_e0>; + }; + core1 { + cpu = <&cpu_e1>; + }; + core2 { + cpu = <&cpu_e2>; + }; + core3 { + cpu = <&cpu_e3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu_p00>; + }; + core1 { + cpu = <&cpu_p01>; + }; + core2 { + cpu = <&cpu_p02>; + }; + core3 { + cpu = <&cpu_p03>; + }; + core4 { + cpu = <&cpu_p04>; + }; + }; + + cluster2 { + core0 { + cpu = <&cpu_p10>; + }; + core1 { + cpu = <&cpu_p11>; + }; + core2 { + cpu = <&cpu_p12>; + }; + core3 { + cpu = <&cpu_p13>; + }; + core4 { + cpu = <&cpu_p14>; + }; + }; + }; + + cpu_e0: cpu@0 { + compatible = "apple,brava-e"; + device_type = "cpu"; + reg = <0x0 0x0>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_e>; + operating-points-v2 = <&opp_e>; + capacity-dmips-mhz = <668>; + performance-domains = <&cpufreq_e>; + #cooling-cells = <2>; + }; + + cpu_e1: cpu@1 { + compatible = "apple,brava-e"; + device_type = "cpu"; + reg = <0x0 0x1>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_e>; + operating-points-v2 = <&opp_e>; + capacity-dmips-mhz = <668>; + performance-domains = <&cpufreq_e>; + #cooling-cells = <2>; + }; + + cpu_e2: cpu@2 { + compatible = "apple,brava-e"; + device_type = "cpu"; + reg = <0x0 0x2>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_e>; + operating-points-v2 = <&opp_e>; + capacity-dmips-mhz = <668>; + performance-domains = <&cpufreq_e>; + #cooling-cells = <2>; + }; + + cpu_e3: cpu@3 { + compatible = "apple,brava-e"; + device_type = "cpu"; + reg = <0x0 0x3>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_e>; + operating-points-v2 = <&opp_e>; + capacity-dmips-mhz = <668>; + performance-domains = <&cpufreq_e>; + #cooling-cells = <2>; + }; + + /* The boot CPU: the boot loader enters the kernel on it. */ + cpu_p00: cpu@10100 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10100>; + next-level-cache = <&l2_cache_p0>; + operating-points-v2 = <&opp_p0>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p0>; + #cooling-cells = <2>; + }; + + cpu_p01: cpu@10101 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10101>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p0>; + operating-points-v2 = <&opp_p0>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p0>; + #cooling-cells = <2>; + }; + + cpu_p02: cpu@10102 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10102>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p0>; + operating-points-v2 = <&opp_p0>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p0>; + #cooling-cells = <2>; + }; + + cpu_p03: cpu@10103 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10103>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p0>; + operating-points-v2 = <&opp_p0>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p0>; + #cooling-cells = <2>; + }; + + cpu_p04: cpu@10104 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10104>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p0>; + operating-points-v2 = <&opp_p0>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p0>; + #cooling-cells = <2>; + }; + + cpu_p10: cpu@10200 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10200>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p1>; + operating-points-v2 = <&opp_p1>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p1>; + #cooling-cells = <2>; + }; + + cpu_p11: cpu@10201 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10201>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p1>; + operating-points-v2 = <&opp_p1>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p1>; + #cooling-cells = <2>; + }; + + cpu_p12: cpu@10202 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10202>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p1>; + operating-points-v2 = <&opp_p1>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p1>; + #cooling-cells = <2>; + }; + + cpu_p13: cpu@10203 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10203>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p1>; + operating-points-v2 = <&opp_p1>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p1>; + #cooling-cells = <2>; + }; + + cpu_p14: cpu@10204 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10204>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p1>; + operating-points-v2 = <&opp_p1>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p1>; + #cooling-cells = <2>; + }; + }; + + l2_cache_e: l2-cache-cluster0 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x400000>; + }; + + l2_cache_p0: l2-cache-cluster1 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x1000000>; + }; + + l2_cache_p1: l2-cache-cluster2 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x1000000>; + }; + + /* + * DVFS states from the ADT: /arm-io/pmgr voltage-states1-sram (E), + * voltage-states5-sram (P0) and voltage-states13-sram (P1), word 0 + * in kHz. opp-level is the hardware p-state. Each P cluster has its + * own table even though the frequencies are the same: opp-shared + * means one clock domain per table. + */ + opp_e: opp-table-e { + compatible = "operating-points-v2"; + opp-shared; + + opp01 { + opp-hz = /bits/ 64 <1020000000>; + opp-level = <1>; + }; + opp02 { + opp-hz = /bits/ 64 <1404000000>; + opp-level = <2>; + }; + opp03 { + opp-hz = /bits/ 64 <1788000000>; + opp-level = <3>; + }; + opp04 { + opp-hz = /bits/ 64 <2112000000>; + opp-level = <4>; + }; + opp05 { + opp-hz = /bits/ 64 <2352000000>; + opp-level = <5>; + }; + opp06 { + opp-hz = /bits/ 64 <2532000000>; + opp-level = <6>; + }; + opp07 { + opp-hz = /bits/ 64 <2592000000>; + opp-level = <7>; + }; + }; + + opp_p0: opp-table-p0 { + compatible = "operating-points-v2"; + opp-shared; + + opp01 { + opp-hz = /bits/ 64 <1260000000>; + opp-level = <1>; + }; + opp02 { + opp-hz = /bits/ 64 <1512000000>; + opp-level = <2>; + }; + opp03 { + opp-hz = /bits/ 64 <1800000000>; + opp-level = <3>; + }; + opp04 { + opp-hz = /bits/ 64 <2088000000>; + opp-level = <4>; + }; + opp05 { + opp-hz = /bits/ 64 <2352000000>; + opp-level = <5>; + }; + opp06 { + opp-hz = /bits/ 64 <2616000000>; + opp-level = <6>; + }; + opp07 { + opp-hz = /bits/ 64 <2868000000>; + opp-level = <7>; + }; + opp08 { + opp-hz = /bits/ 64 <3096000000>; + opp-level = <8>; + }; + opp09 { + opp-hz = /bits/ 64 <3300000000>; + opp-level = <9>; + }; + opp10 { + opp-hz = /bits/ 64 <3468000000>; + opp-level = <10>; + }; + opp11 { + opp-hz = /bits/ 64 <3624000000>; + opp-level = <11>; + }; + opp12 { + opp-hz = /bits/ 64 <3756000000>; + opp-level = <12>; + }; + opp13 { + opp-hz = /bits/ 64 <3852000000>; + opp-level = <13>; + }; + opp14 { + opp-hz = /bits/ 64 <3924000000>; + opp-level = <14>; + }; + opp15 { + opp-hz = /bits/ 64 <3996000000>; + opp-level = <15>; + }; + opp16 { + opp-hz = /bits/ 64 <4044000000>; + opp-level = <16>; + }; + opp17 { + opp-hz = /bits/ 64 <4104000000>; + opp-level = <17>; + }; + opp18 { + opp-hz = /bits/ 64 <4416000000>; + opp-level = <18>; + }; + opp19 { + opp-hz = /bits/ 64 <4512000000>; + opp-level = <19>; + }; + }; + + opp_p1: opp-table-p1 { + compatible = "operating-points-v2"; + opp-shared; + + opp01 { + opp-hz = /bits/ 64 <1260000000>; + opp-level = <1>; + }; + opp02 { + opp-hz = /bits/ 64 <1512000000>; + opp-level = <2>; + }; + opp03 { + opp-hz = /bits/ 64 <1800000000>; + opp-level = <3>; + }; + opp04 { + opp-hz = /bits/ 64 <2088000000>; + opp-level = <4>; + }; + opp05 { + opp-hz = /bits/ 64 <2352000000>; + opp-level = <5>; + }; + opp06 { + opp-hz = /bits/ 64 <2616000000>; + opp-level = <6>; + }; + opp07 { + opp-hz = /bits/ 64 <2868000000>; + opp-level = <7>; + }; + opp08 { + opp-hz = /bits/ 64 <3096000000>; + opp-level = <8>; + }; + opp09 { + opp-hz = /bits/ 64 <3300000000>; + opp-level = <9>; + }; + opp10 { + opp-hz = /bits/ 64 <3468000000>; + opp-level = <10>; + }; + opp11 { + opp-hz = /bits/ 64 <3624000000>; + opp-level = <11>; + }; + opp12 { + opp-hz = /bits/ 64 <3756000000>; + opp-level = <12>; + }; + opp13 { + opp-hz = /bits/ 64 <3852000000>; + opp-level = <13>; + }; + opp14 { + opp-hz = /bits/ 64 <3924000000>; + opp-level = <14>; + }; + opp15 { + opp-hz = /bits/ 64 <3996000000>; + opp-level = <15>; + }; + opp16 { + opp-hz = /bits/ 64 <4044000000>; + opp-level = <16>; + }; + opp17 { + opp-hz = /bits/ 64 <4104000000>; + opp-level = <17>; + }; + opp18 { + opp-hz = /bits/ 64 <4416000000>; + opp-level = <18>; + }; + opp19 { + opp-hz = /bits/ 64 <4512000000>; + opp-level = <19>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&aic>; + interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt"; + interrupts = , + , + , + ; + }; + + /* The 24 MHz reference clock (ADT clock-ids 4) of the I2C, PWM and watchdog blocks */ + clkref: clock-ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "clkref"; + }; + + /* + * Display component master. It has no registers; the boot loader + * enables it with the DCP when it hands the display over. + */ + display: display-subsystem { + compatible = "apple,display-subsystem"; + iommus = <&disp0_dart 0>; + dma-noncoherent; + status = "disabled"; + }; + + cpufreq_e: cpufreq@210e20000 { + compatible = "apple,t6041-cluster-cpufreq", "apple,t8112-cluster-cpufreq"; + reg = <0x2 0x10e20000 0x0 0x1000>; + nonposted-mmio; + #performance-domain-cells = <0>; + /* PMP fast die-temperature effort, byte 0 of FAST-DIE-CE */ + apple,fast-die-effort = <&pmp_report 0>; + }; + + cpufreq_p0: cpufreq@211e20000 { + compatible = "apple,t6041-cluster-cpufreq", "apple,t8112-cluster-cpufreq"; + reg = <0x2 0x11e20000 0x0 0x1000>; + nonposted-mmio; + #performance-domain-cells = <0>; + apple,fast-die-effort = <&pmp_report 1>; + }; + + cpufreq_p1: cpufreq@212e20000 { + compatible = "apple,t6041-cluster-cpufreq", "apple,t8112-cluster-cpufreq"; + reg = <0x2 0x12e20000 0x0 0x1000>; + nonposted-mmio; + #performance-domain-cells = <0>; + apple,fast-die-effort = <&pmp_report 2>; + }; + + /* + * System level cache planes: four AMCCs with four planes each. + * Allocation waits for the display, which takes over the scan-out DMA + * the boot loader left running. + */ + mcc: memory-controller@220000000 { + compatible = "apple,t6041-mcc", "apple,t8140-mcc"; + reg = <0x2 0x20000000 0x0 0x4000>, + <0x2 0x20040000 0x0 0x4000>, + <0x2 0x20080000 0x0 0x4000>, + <0x2 0x200c0000 0x0 0x4000>, + <0x2 0x22000000 0x0 0x4000>, + <0x2 0x22040000 0x0 0x4000>, + <0x2 0x22080000 0x0 0x4000>, + <0x2 0x220c0000 0x0 0x4000>, + <0x2 0x24000000 0x0 0x4000>, + <0x2 0x24040000 0x0 0x4000>, + <0x2 0x24080000 0x0 0x4000>, + <0x2 0x240c0000 0x0 0x4000>, + <0x2 0x26000000 0x0 0x4000>, + <0x2 0x26040000 0x0 0x4000>, + <0x2 0x26080000 0x0 0x4000>, + <0x2 0x260c0000 0x0 0x4000>; + nonposted-mmio; + apple,boot-dma-devices = <&display>; + status = "disabled"; + }; + + /* + * The decoder firmware programs the T8122/T8132 register family, so + * the driver binds through its T8132 entry. The ADT gives the whole + * block (0x2_80000000, 0x1404000); the windows follow the T6030/T8140 + * layout, with the CM3 SRAM between its code and the mailbox. + */ + avd: avd@280000000 { + compatible = "apple,t6041-avd", "apple,t8132-avd"; + reg = <0x2 0x81080000 0x0 0x14000>, + <0x2 0x81094000 0x0 0x14000>, + <0x2 0x810a8000 0x0 0x4000>, + <0x2 0x81100000 0x0 0x10000>; + reg-names = "code", "sram", "mbox", "ctrl"; + interrupt-parent = <&aic>; + interrupts = , + ; + power-domains = <&ps_avd_sys>; + resets = <&ps_avd_sys>; + iommus = <&avd_dart 0>; + }; + + avd_dart: iommu@281020000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x2 0x81020000 0x0 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_avd_sys>; + }; + + disp0_dart: iommu@402300000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x4 0x02300000 0x0 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + status = "disabled"; + }; + + dcp_dart: iommu@402340000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x4 0x02340000 0x0 0x20000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + status = "disabled"; + }; + + dcp: dcp@402e00000 { + compatible = "apple,t6041-dcp", "apple,dcp"; + reg = <0x4 0x02e00000 0x0 0x4000>, + <0x4 0x00000000 0x0 0x4000000>, + <0x4 0x02240000 0x0 0x10000>, + <0x4 0x023a8000 0x0 0x4000>, + <0x4 0x02800000 0x0 0x800000>; + reg-names = "coproc", "disp-0", "disp-1", "disp-2", "disp-3"; + mboxes = <&dcp_mbox>; + mbox-names = "mbox"; + iommus = <&dcp_dart 23>; + apple,bw-scratch = <&pmgr_dcp 0 4 0x20000>; + apple,iomfb-surfaces = <1 1 0 0>; + /* the boot loader enables it when it hands the display over */ + status = "disabled"; + + disp0_piodma: piodma { + iommus = <&disp0_dart 16>; + }; + }; + + dcp_mbox: mailbox@402e08000 { + compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x4 0x02e08000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + #mbox-cells = <0>; + status = "disabled"; + }; + + ans_mbox: mailbox@409608000 { + compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x4 0x09608000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + power-domains = <&ps_ans>; + #mbox-cells = <0>; + status = "disabled"; + }; + + ans_sart: sart@40dc50000 { + compatible = "apple,t6041-sart", "apple,t6000-sart"; + reg = <0x4 0x0dc50000 0x0 0xc000>; + power-domains = <&ps_ans>; + status = "disabled"; + }; + + pcie_dart: iommu@410000000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x4 0x10000000 0x0 0x20000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + status = "disabled"; + }; + + /* iBoot leaves the I2C gates on and the pins muxed to I2C. */ + i2c1: i2c@429014000 { + compatible = "apple,t6041-i2c", "apple,t8103-i2c"; + reg = <0x4 0x29014000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@429018000 { + compatible = "apple,t6041-i2c", "apple,t8103-i2c"; + reg = <0x4 0x29018000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c2>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c3: i2c@42901c000 { + compatible = "apple,t6041-i2c", "apple,t8103-i2c"; + reg = <0x4 0x2901c000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c4: i2c@429020000 { + compatible = "apple,t6041-i2c", "apple,t8103-i2c"; + reg = <0x4 0x29020000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c4_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c4>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c6: i2c@429028000 { + compatible = "apple,t6041-i2c", "apple,t8103-i2c"; + reg = <0x4 0x29028000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c6_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c6>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c8: i2c@429030000 { + compatible = "apple,t6041-i2c", "apple,t8103-i2c"; + reg = <0x4 0x29030000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c8_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c8>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + fpwm0: pwm@429040000 { + compatible = "apple,t6041-fpwm", "apple,s5l-fpwm"; + reg = <0x4 0x29040000 0x0 0x4000>; + clocks = <&clkref>; + power-domains = <&ps_fpwm0>; + #pwm-cells = <2>; + status = "disabled"; + }; + + nvme: nvme@44dcc0000 { + compatible = "apple,t6041-nvme-ans2"; + reg = <0x4 0x4dcc0000 0x0 0x10000>, + <0x4 0x09600000 0x0 0x4000>, + <0x4 0x0dcc0000 0x0 0x60000>; + reg-names = "nvme", "ans", "nvmmu"; + interrupt-parent = <&aic>; + interrupts = ; + mboxes = <&ans_mbox>; + apple,sart = <&ans_sart>; + power-domains = <&ps_ans>, <&ps_apcie_sys_st0>, + <&ps_apcie_sys_st1>; + power-domain-names = "ans", "apcie0", "apcie1"; + resets = <&ps_ans>; + status = "disabled"; + }; + + /* + * PMP (power management coprocessor). iBoot locks its DART (PROTECT + * 0x1e7, SIDs 0 and 1 translating): apple-dart adopts iBoot's SID 0 + * table and leaves SID 1 alone. apple,dma-range keeps Linux's IOVAs + * in the ADT window (vm-base 0x100_0000_0000, 64 GiB). The DART's + * second ADT range is the SoC's shared clock-protection block, not + * part of the DART. + */ + pmp_dart: iommu@500300000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x5 0x00300000 0x0 0xc000>; + interrupt-parent = <&aic>; + interrupts = ; + #iommu-cells = <1>; + apple,dma-range = <0x100 0x0 0x10 0x0>; + power-domains = <&ps_pmp>; + status = "disabled"; + }; + + /* + * Report (PTD) region: reads 16 bytes per entry at +0x0, writes 8 + * bytes per entry at +0x10000. Entries are PMP soc-devices; every + * entry reads 0 while the PMP is stopped. + */ + pmp_report: pmp-report@5003c0000 { + compatible = "apple,t6041-pmp-v2-report"; + reg = <0x5 0x003c0000 0x0 0x20000>; + nonposted-mmio; + power-domains = <&ps_pms_sram>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + /* The CPU clusters, for their fast die-temperature loops */ + report@a { + compatible = "apple,t6041-pmp-v2-report-entry", + "apple,t6000-pmp-v2-report-entry"; + reg = <0xa>; + label = "pmp-eacc0"; + #power-domain-cells = <0>; + apple,always-on; + }; + + report@b { + compatible = "apple,t6041-pmp-v2-report-entry", + "apple,t6000-pmp-v2-report-entry"; + reg = <0xb>; + label = "pmp-pacc0"; + #power-domain-cells = <0>; + apple,always-on; + }; + + report@c { + compatible = "apple,t6041-pmp-v2-report-entry", + "apple,t6000-pmp-v2-report-entry"; + reg = <0xc>; + label = "pmp-pacc1"; + #power-domain-cells = <0>; + apple,always-on; + }; + + /* + * The GPU (soc-device 13). Without it the running PMP treats + * the GPU as off and holds it at its lowest state. + */ + report@d { + compatible = "apple,t6041-pmp-v2-report-entry", + "apple,t6000-pmp-v2-report-entry"; + reg = <0xd>; + label = "pmp-gfx"; + #power-domain-cells = <0>; + apple,always-on; + }; + }; + + /* + * The boot loader adds the per-unit properties (board, DRAM) and the + * firmware tunables the driver needs before it starts the PMP. + */ + pmp: pmp@500700000 { + compatible = "apple,t6041-pmp-v2", "apple,t6000-pmp-v2"; + reg = <0x5 0x00700000 0x0 0xe0000>, + <0x5 0x00e00000 0x0 0x4000>; + reg-names = "pmp", "asc"; + mboxes = <&pmp_mbox>; + mbox-names = "mbox"; + iommus = <&pmp_dart 0>; + power-domains = <&ps_pmp>; + apple,pmc = <1>; + apple,pmc-pmgr = <0x3f>; + status = "disabled"; + }; + + pmp_mbox: mailbox@500e08000 { + compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x5 0x00e08000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + power-domains = <&ps_pmp>, <&ps_pms_sram>; + #mbox-cells = <0>; + status = "disabled"; + }; + + pmgr: power-management@502280000 { + compatible = "apple,t6041-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x5 0x02280000 0x0 0x4000>; + /* child nodes are added in t6040-pmgr.dtsi */ + }; + + pmgr_isp: power-management@502284000 { + compatible = "apple,t6041-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x5 0x02284000 0x0 0x4000>; + /* child nodes are added in t6040-pmgr.dtsi */ + }; + + aic: interrupt-controller@502400000 { + compatible = "apple,t6041-aic3", "apple,t8122-aic3"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x5 0x02400000 0x0 0x184000>, + <0x5 0x02440000 0x0 0x4>; + reg-names = "core", "event"; + }; + + pmgr_aux: power-management@502800000 { + compatible = "apple,t6041-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x5 0x02800000 0x0 0x4000>; + /* child nodes are added in t6040-pmgr.dtsi */ + }; + + /* + * The PMGR range the DCP driver hands to its firmware; apple,bw-scratch + * points into it. + */ + pmgr_dcp: power-management@504800000 { + reg = <0x5 0x04800000 0x0 0xbc000>; + reg-names = "dcp-fw-pmgr"; + #apple,bw-scratch-cells = <3>; + }; + + /* + * PMC voter interface: the floor word of agent a at "voters" + + * 0x4000 * a, the floors the PMC honours and the rail enable words + * at "rails". Both lie inside pmgr_dcp's range, which the DCP driver + * only hands to its firmware, so the two do not conflict; "rails" + * comes first so that this node's unit address differs from + * pmgr_dcp's. + * Static voters are CLPC (1) and AP (3). The PMP's agent (0) stays + * off while the PMP does not run: iBoot leaves its floor at the top + * DCS state. + */ + pmc: power-management@5048aa000 { + compatible = "apple,t6041-pmc"; + reg = <0x5 0x048aa000 0x0 0x3000>, + <0x5 0x04800000 0x0 0x10000>; + reg-names = "rails", "voters"; + nonposted-mmio; + #address-cells = <1>; + #size-cells = <0>; + apple,static-voters = <1 3>; + status = "disabled"; + + clpc: performance-controller@1 { + compatible = "apple,t6041-clpc"; + reg = <1>; + }; + }; + + /* + * The always-on GPIO bank (ADT /arm-io/nub-gpio0, 61 pins). Its power + * state is in the always-on PMGR. + */ + pinctrl_nub: pinctrl@5081e4000 { + compatible = "apple,t6041-pinctrl", "apple,t8103-pinctrl"; + reg = <0x5 0x081e4000 0x0 0x4000>; + power-domains = <&ps_nub_gpio>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_nub 0 0 61>; + apple,npins = <61>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + status = "disabled"; + }; + + pmgr_mini: power-management@508300000 { + compatible = "apple,t6041-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x5 0x08300000 0x0 0x4000>; + /* child nodes are added in t6040-pmgr.dtsi */ + }; + + /* + * The driver arms the reset only when userspace opens /dev/watchdog + * or the firmware left it running; it also provides restart. + */ + wdt: watchdog@50836c000 { + compatible = "apple,t6041-wdt", "apple,t8103-wdt"; + reg = <0x5 0x0836c000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + }; + + nub_spmi0: spmi@509014000 { + compatible = "apple,t6041-spmi", "apple,t8103-spmi"; + reg = <0x5 0x09014000 0x0 0x100>; + #address-cells = <2>; + #size-cells = <0>; + status = "disabled"; + + pmic@e { + compatible = "apple,abbey-pmic", "apple,spmi-nvmem"; + reg = <0xe SPMI_USID>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + rtc_offset: rtc-offset@2100 { + reg = <0x2100 0x6>; + }; + + boot_stage: boot-stage@f801 { + reg = <0xf801 0x1>; + }; + + boot_error_count: boot-error-count@f802,0 { + reg = <0xf802 0x1>; + bits = <0 4>; + }; + + panic_count: panic-count@f802,4 { + reg = <0xf802 0x1>; + bits = <4 4>; + }; + + shutdown_flag: shutdown-flag@f80f,3 { + reg = <0xf80f 0x1>; + bits = <3 1>; + }; + }; + }; + }; + + smc: smc@50c600000 { + compatible = "apple,t6041-smc", "apple,t8103-smc", "apple,smc"; + reg = <0x5 0x0c600000 0x0 0x4000>, + <0x5 0x0de70000 0x0 0x100000>; + reg-names = "smc", "sram"; + mboxes = <&smc_mbox>; + status = "disabled"; + + smc_gpio: gpio { + compatible = "apple,smc-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + + smc_hwmon: hwmon { + compatible = "apple,smc-hwmon"; + #thermal-sensor-cells = <1>; + }; + + smc_reboot: reboot { + compatible = "apple,smc-reboot"; + nvmem-cells = <&shutdown_flag>, <&boot_stage>, + <&boot_error_count>, <&panic_count>; + nvmem-cell-names = "shutdown_flag", "boot_stage", + "boot_error_count", "panic_count"; + }; + + smc_rtc: rtc { + compatible = "apple,smc-rtc"; + nvmem-cells = <&rtc_offset>; + nvmem-cell-names = "rtc_offset"; + }; + }; + + smc_mbox: mailbox@50c608000 { + compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x5 0x0c608000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + #mbox-cells = <0>; + status = "disabled"; + }; + + /* + * AOP (always-on processor). The boot loader loads its RTKit firmware + * and leaves it stopped; Linux starts it. + */ + aop: aop@510600000 { + compatible = "apple,t6041-aop"; + reg = <0x5 0x10c10000 0x0 0x2e0000>, + <0x5 0x10600000 0x0 0x88000>, + <0x5 0x10050000 0x0 0x4000>, + <0x5 0x08328000 0x0 0x24>; + reg-names = "firmware", "asc", "asc-aux", "config"; + mboxes = <&aop_mbox>; + mbox-names = "mbox"; + iommus = <&aop_dart 0>; + status = "disabled"; + + /* + * "dma" is the microphones' LEAP ADMAC channel; "spkr" and + * "sense" are the speaker stream's base-ns ADMAC channels 0 and + * 1 (ADT audio-speaker dma-channels), "cout" and "cin" the + * headphone jack's channels 4 and 5 (TX2 and RX2, ADT + * audio-codec-output and audio-codec-input). + */ + aop_audio: audio { + compatible = "apple,t6041-aop-audio", "apple,t6030-aop-audio"; + dmas = <&admac0 1>, <&admac1 0>, <&admac1 1>, <&admac1 4>, + <&admac1 5>; + dma-names = "dma", "spkr", "sense", "cout", "cin"; + #sound-dai-cells = <1>; + }; + + aop_als: als { + compatible = "apple,t6041-aop-als", "apple,aop-als"; + }; + + aop_las: las { + compatible = "apple,t6041-aop-las", "apple,aop-las"; + }; + }; + + /* ADT lists the interrupts as 1, 0, 3, 2 of the block: send-empty is the lowest. */ + aop_mbox: mailbox@510608000 { + compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x5 0x10608000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + #mbox-cells = <0>; + status = "disabled"; + }; + + aop_dart: iommu@510f00000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x5 0x10f00000 0x0 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + status = "disabled"; + }; + + /* The audio fabric's ADMACs: admac-leap-ns (DART stream 10) and admac-base-ns (stream 8) */ + admac0: dma-controller@513300000 { + compatible = "apple,t6041-admac", "apple,t8132-admac"; + reg = <0x5 0x13300000 0x0 0x34000>; + #dma-cells = <1>; + dma-channels = <18>; + /* the ADT gives the first of the four outputs */ + interrupts-extended = <&aic AIC_IRQ 757 IRQ_TYPE_LEVEL_HIGH>, + <0>, <0>, <0>; + iommus = <&aop_dart 10>; + status = "disabled"; + }; + + admac1: dma-controller@513800000 { + compatible = "apple,t6041-admac", "apple,t8132-admac"; + reg = <0x5 0x13800000 0x0 0x34000>; + #dma-cells = <1>; + dma-channels = <13>; + /* the ADT gives the first of the four outputs */ + interrupts-extended = <&aic AIC_IRQ 754 IRQ_TYPE_LEVEL_HIGH>, + <0>, <0>, <0>; + iommus = <&aop_dart 8>; + status = "disabled"; + }; + + mtp: mtp@514600000 { + compatible = "apple,t6041-mtp", "apple,t6041-rtk-helper-asc4", + "apple,mtp", "apple,rtk-helper-asc4"; + reg = <0x5 0x14600000 0x0 0x4000>; + reg-names = "asc"; + mboxes = <&mtp_mbox>; + iommus = <&mtp_dart 0>; + #helper-cells = <0>; + status = "disabled"; + }; + + mtp_mbox: mailbox@514608000 { + compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x5 0x14608000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + #mbox-cells = <0>; + status = "disabled"; + }; + + mtp_dart: iommu@514800000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x5 0x14800000 0x0 0xc000>; + interrupt-parent = <&aic>; + interrupts = ; + #iommu-cells = <1>; + /* ADT "remap": streams 1 2 3 are stream 0 */ + apple,remap-streams = <1 0>, <2 0>, <3 0>; + status = "disabled"; + }; + + mtp_dockchannel: fifo@514b14000 { + compatible = "apple,t6041-dockchannel", "apple,dockchannel"; + reg = <0x5 0x14b14000 0x0 0x1000>; + reg-names = "irq"; + interrupt-parent = <&aic>; + interrupts = ; + + ranges = <0x0 0x5 0x14b28000 0x10000>; + nonposted-mmio; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + + mtp_hid: input@0 { + compatible = "apple,t6041-dockchannel-hid", "apple,dockchannel-hid"; + reg = <0x0000 0x1000>, + <0x4000 0x1000>, + <0x8000 0x1000>, + <0xc000 0x1000>; + reg-names = "rmt-config", "rmt-data", "config", "data"; + iommus = <&mtp_dart 0>; + interrupt-parent = <&mtp_dockchannel>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>, + <3 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tx", "rx"; + apple,fifo-size = <0x800>; + apple,helper-cpu = <&mtp>; + }; + }; + + pinctrl: pinctrl@51c000000 { + compatible = "apple,t6041-pinctrl", "apple,t8103-pinctrl"; + reg = <0x5 0x1c000000 0x0 0x4000>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 200>; + apple,npins = <200>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + status = "disabled"; + + /* I2C is function 1 (ADT gpio-iic_scl/sda) */ + i2c1_pins: i2c1-pins { + pinmux = , + ; + }; + + i2c2_pins: i2c2-pins { + pinmux = , + ; + }; + + i2c3_pins: i2c3-pins { + pinmux = , + ; + }; + + i2c4_pins: i2c4-pins { + pinmux = , + ; + }; + + i2c6_pins: i2c6-pins { + pinmux = , + ; + }; + + i2c8_pins: i2c8-pins { + pinmux = , + ; + }; + }; + + /* + * ISP (ADT isp0, firmware loaded by iBoot). "coproc" is the + * coprocessor up to its control block; "mbox", "gpio" and "mbox2" are + * the interrupt words, the firmware handshake words and the doorbell + * of its mailbox at +0x2924000. The first of the ADT's four + * interrupts carries the mailbox. + */ + isp: isp@580000000 { + compatible = "apple,t6041-isp", "apple,isp"; + reg = <0x5 0x80000000 0x0 0x1604000>, + <0x5 0x82924000 0x0 0x40>, + <0x5 0x829241d0 0x0 0x20>, + <0x5 0x82924464 0x0 0x10>; + reg-names = "coproc", "mbox", "gpio", "mbox2"; + interrupt-parent = <&aic>; + interrupts = ; + iommus = <&isp_dart0 0>, <&isp_dart1 0>, <&isp_dart2 0>; + power-domains = <&ps_isp_sys>, <&ps_isp_cpu>, <&ps_isp_fe>, + <&ps_isp_dprx>, <&ps_isp_secure>, <&ps_isp_be>, + <&ps_isp_clr>, <&ps_ispsens0>; + /* the shared memory window above the firmware's 32 MiB */ + apple,dart-vm-size = /bits/ 64 <0xde600000>; + status = "disabled"; + }; + + /* + * ADT dart-isp0: three instances on one interrupt; ADT "remap": streams + * 1, 6, 7, 10 and 11 are stream 0. + */ + isp_dart0: iommu@5828c0000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x5 0x828c0000 0x0 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_isp_sys>; + apple,remap-streams = <1 0>, <6 0>, <7 0>, <10 0>, <11 0>; + status = "disabled"; + }; + + isp_dart1: iommu@5828e0000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x5 0x828e0000 0x0 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_isp_sys>; + apple,remap-streams = <1 0>, <6 0>, <7 0>, <10 0>, <11 0>; + status = "disabled"; + }; + + isp_dart2: iommu@582900000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x5 0x82900000 0x0 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_isp_sys>; + apple,remap-streams = <1 0>, <6 0>, <7 0>, <10 0>, <11 0>; + status = "disabled"; + }; +}; + +#include "t6040-pmgr.dtsi"