From dca81aa4f04be297ab9871fdb943e725723de281 Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:49 -0300 Subject: [PATCH 01/16] dt-bindings: apple: Add the T6041 entries the J616s device tree uses The M4 Pro/Max (T6041) compatibles of the SART, the DockChannel FIFO, the MTP helper and the DCP follow the patterns of the earlier SoCs; add them next to the T6041 compatibles already documented. The T6041 cluster cpufreq blocks are driven like the T8112's, as the T6020's are, so allow the T6041 entry with the T8112 fallback; the T6041 SPMI controllers are driven like the T8103's. apple,fast-die-effort names the cluster's lane in the PMP report. T6041 has three clusters (E, P0, P1), so allow lane 2. Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- .../bindings/cpufreq/apple,cluster-cpufreq.yaml | 9 ++++++--- Documentation/devicetree/bindings/display/apple,dcp.yaml | 1 + Documentation/devicetree/bindings/iommu/apple,sart.yaml | 1 + .../devicetree/bindings/soc/apple/apple,dockchannel.yaml | 1 + .../bindings/soc/apple/apple,rtk-helper-asc4.yaml | 2 ++ Documentation/devicetree/bindings/spmi/apple,spmi.yaml | 1 + 6 files changed, 12 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml b/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml index a27f4314e0387..69daba3d1664c 100644 --- a/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml +++ b/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml @@ -39,7 +39,9 @@ properties: - const: apple,t8142-cluster-cpufreq - const: apple,t8152-cluster-cpufreq - items: - - const: apple,t6020-cluster-cpufreq + - enum: + - apple,t6020-cluster-cpufreq + - apple,t6041-cluster-cpufreq - const: apple,t8112-cluster-cpufreq reg: @@ -54,8 +56,9 @@ properties: items: - items: - description: PMP report region - - description: Cluster lane (0 for E, 1 for P on T8140) - enum: [0, 1] + - description: Cluster lane (0 for E, 1 for P on T8140; 0 for + E, 1 for P0, 2 for P1 on T6041) + enum: [0, 1, 2] '#performance-domain-cells': const: 0 diff --git a/Documentation/devicetree/bindings/display/apple,dcp.yaml b/Documentation/devicetree/bindings/display/apple,dcp.yaml index a7c74d948e6e9..7b1e5eb547648 100644 --- a/Documentation/devicetree/bindings/display/apple,dcp.yaml +++ b/Documentation/devicetree/bindings/display/apple,dcp.yaml @@ -23,6 +23,7 @@ properties: - apple,t8112-dcp - apple,t6000-dcp - apple,t6020-dcp + - apple,t6041-dcp - apple,t8140-dcp - apple,t8142-dcp - const: apple,dcp diff --git a/Documentation/devicetree/bindings/iommu/apple,sart.yaml b/Documentation/devicetree/bindings/iommu/apple,sart.yaml index 472454c3d24d6..f32fd61905c77 100644 --- a/Documentation/devicetree/bindings/iommu/apple,sart.yaml +++ b/Documentation/devicetree/bindings/iommu/apple,sart.yaml @@ -32,6 +32,7 @@ properties: - items: - enum: - apple,t6020-sart + - apple,t6041-sart - apple,t8112-sart - apple,t8122-sart - apple,t8140-sart diff --git a/Documentation/devicetree/bindings/soc/apple/apple,dockchannel.yaml b/Documentation/devicetree/bindings/soc/apple/apple,dockchannel.yaml index a3362df34e148..0c22efbf04643 100644 --- a/Documentation/devicetree/bindings/soc/apple/apple,dockchannel.yaml +++ b/Documentation/devicetree/bindings/soc/apple/apple,dockchannel.yaml @@ -25,6 +25,7 @@ properties: - apple,t6020-dockchannel - apple,t6030-dockchannel - apple,t6031-dockchannel + - apple,t6041-dockchannel - apple,t8112-dockchannel - apple,t8122-dockchannel - apple,t8140-dockchannel diff --git a/Documentation/devicetree/bindings/soc/apple/apple,rtk-helper-asc4.yaml b/Documentation/devicetree/bindings/soc/apple/apple,rtk-helper-asc4.yaml index da78694e37466..ac5a5fa0b329f 100644 --- a/Documentation/devicetree/bindings/soc/apple/apple,rtk-helper-asc4.yaml +++ b/Documentation/devicetree/bindings/soc/apple/apple,rtk-helper-asc4.yaml @@ -25,6 +25,7 @@ properties: - apple,t6020-mtp - apple,t6030-mtp - apple,t6031-mtp + - apple,t6041-mtp - apple,t8112-mtp - apple,t8122-mtp - apple,t8140-mtp @@ -32,6 +33,7 @@ properties: - enum: - apple,t6020-rtk-helper-asc4 - apple,t6030-rtk-helper-asc4 + - apple,t6041-rtk-helper-asc4 - apple,t8112-rtk-helper-asc4 - apple,t8122-rtk-helper-asc4 - apple,t8140-rtk-helper-asc4 diff --git a/Documentation/devicetree/bindings/spmi/apple,spmi.yaml b/Documentation/devicetree/bindings/spmi/apple,spmi.yaml index f88e21c348667..13f24c3f086c1 100644 --- a/Documentation/devicetree/bindings/spmi/apple,spmi.yaml +++ b/Documentation/devicetree/bindings/spmi/apple,spmi.yaml @@ -22,6 +22,7 @@ properties: - apple,t6020-spmi - apple,t6030-spmi - apple,t6031-spmi + - apple,t6041-spmi - apple,t8012-spmi - apple,t8015-spmi - apple,t8122-spmi From 9dadcc6c7dd76633717b51c51891777016b8742e Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:50 -0300 Subject: [PATCH 02/16] arm64: dts: apple: Add the T6040 SoC and the MacBook Pro J616s Add the Apple M4 Pro (T6040) and the MacBook Pro (16-inch, M4 Pro, 2024), J616s, in the layout of the T8140 and T6030 trees: t6040.dtsi with the SoC blocks disabled, t6040-pmgr.dtsi with their power domains, and t6040-j616s.dts enabling what the board uses. SoC blocks use the apple,t6041-* compatibles; apple,t6040 is the machine compatible. This first part is the base SoC: - the 14 CPUs in three clusters (MPIDR Aff1, also the L2 groups) with their caches, cpu-map and capacities. capacity-dmips-mhz comes from pinned single-core runs at the lowest p-state (E 1018 MHz, P 1257 MHz): E/P is 0.652 per MHz, so E 668 and P 1024; - the AIC, the timer and the 24 MHz reference clock; - the PMGR blocks and the power domains of these devices; - the AP and always-on pin controllers. The always-on bank's interrupts stay with the AOP firmware, which owns some of its pins; - the I2C controllers (the J616s wires i2c1/2/3/4/6/8; i2c6 carries the Type-C retimers); - the watchdog; - the PMIC's NVMEM cells on SPMI and the SMC with its GPIO, reboot and RTC functions. The RTC offset is the PMU's info-clock_offset, as on T6030; - the keyboard backlight PWM. The nodes sit at the root rather than under a simple-bus: the boot loader edits several of them by path. The blocks known to need non-posted writes carry nonposted-mmio themselves. The loader fills in /memory, the framebuffer and the CPU release addresses. Values are from the J616s Apple Device Tree (macOS 26.6.2). The apple,t6041-* naming follows Yureka Lilian's acked T604x bindings, merged with commit 573f98bfdee1 ("Merge pull request #372 from jgoyvaerts/m4pro/dt-bindings-t604x"). The RTC offset cell location follows CJ Damsleth's T6040 device tree, which read the same ADT property on a J614s. Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/Makefile | 1 + arch/arm64/boot/dts/apple/t6040-j616s.dts | 94 ++++ arch/arm64/boot/dts/apple/t6040-pmgr.dtsi | 116 +++++ arch/arm64/boot/dts/apple/t6040.dtsi | 570 ++++++++++++++++++++++ 4 files changed, 781 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/t6040-j616s.dts create mode 100644 arch/arm64/boot/dts/apple/t6040-pmgr.dtsi create mode 100644 arch/arm64/boot/dts/apple/t6040.dtsi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple/Makefile index d15eeeb9ece3f..007e204fdbc56 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -94,6 +94,7 @@ dtb-$(CONFIG_ARCH_APPLE) += t6031-j516c.dtb dtb-$(CONFIG_ARCH_APPLE) += t6032-j575d.dtb dtb-$(CONFIG_ARCH_APPLE) += t6034-j514m.dtb dtb-$(CONFIG_ARCH_APPLE) += t6034-j516m.dtb +dtb-$(CONFIG_ARCH_APPLE) += t6040-j616s.dtb dtb-$(CONFIG_ARCH_APPLE) += t8112-j413.dtb dtb-$(CONFIG_ARCH_APPLE) += t8112-j415.dtb dtb-$(CONFIG_ARCH_APPLE) += t8112-j473.dtb diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts new file mode 100644 index 0000000000000..30c91d46d3398 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (16-inch, M4 Pro, Nov 2024) + * + * target-type: J616s + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6040.dtsi" +#include +#include + +/ { + compatible = "apple,j616s", "apple,t6040", "apple,arm-platform"; + model = "Apple MacBook Pro (16-inch, M4 Pro, Nov 2024)"; + chassis-type = "laptop"; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer0: framebuffer@0 { + compatible = "apple,simple-framebuffer", "simple-framebuffer"; + reg = <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status = "disabled"; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + /* The loader adds its own reservations */ + }; + + memory@0 { + device_type = "memory"; + reg = <0 0 0 0>; /* To be filled by loader */ + }; + + led-controller { + compatible = "pwm-leds"; + + led-0 { + pwms = <&fpwm0 0 40000>; + label = "apple::kbd_backlight"; + function = LED_FUNCTION_KBD_BACKLIGHT; + color = ; + max-brightness = <255>; + }; + }; +}; + +&smc { + status = "okay"; +}; + +&smc_mbox { + status = "okay"; +}; + +&nub_spmi0 { + status = "okay"; +}; + +&pinctrl { + status = "okay"; +}; + +/* + * The AP takes none of the always-on bank's interrupts: the AOP firmware + * owns some of its pins and interrupt registers, and a chained handler here + * would see their pending bits without a handler of ours. + */ +&pinctrl_nub { + status = "okay"; + /delete-property/ interrupt-controller; + /delete-property/ #interrupt-cells; + /delete-property/ interrupts; +}; + +&fpwm0 { + status = "okay"; +}; + +/* The Type-C retimers (ADT atcrt at 0x18/0x19/0x1a) sit on this bus; no driver yet. */ +&i2c6 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi b/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi new file mode 100644 index 0000000000000..9186ddf5f3968 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * PMGR power domains for the Apple T6040 "M4 Pro" SoC + * + * From the J616s ADT /arm-io/pmgr devices and their parents. + * + * Copyright The Asahi Linux Contributors + */ + +&pmgr { + ps_fab3_soc: power-controller@118 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x118 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "fab3_soc"; + power-domains = <&ps_afc>; + apple,always-on; + }; + + ps_sio: power-controller@120 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x120 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "sio"; + power-domains = <&ps_fab3_soc>; + apple,always-on; + }; + + ps_fpwm0: power-controller@138 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x138 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "fpwm0"; + power-domains = <&ps_sio>; + }; + + ps_i2c1: power-controller@158 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x158 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c1"; + power-domains = <&ps_sio>; + }; + + ps_i2c2: power-controller@160 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x160 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c2"; + power-domains = <&ps_sio>; + }; + + ps_i2c3: power-controller@168 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x168 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c3"; + power-domains = <&ps_sio>; + }; + + ps_i2c4: power-controller@170 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x170 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c4"; + power-domains = <&ps_sio>; + }; + + ps_i2c6: power-controller@180 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x180 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c6"; + power-domains = <&ps_sio>; + }; + + ps_i2c8: power-controller@190 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x190 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c8"; + power-domains = <&ps_sio>; + }; +}; + +&pmgr_aux { + ps_afc: power-controller@178 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x178 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "afc"; + apple,always-on; + }; +}; + +&pmgr_mini { + /* ADT pmgr device NUB_GPIO (0x11a), no parent */ + ps_nub_gpio: power-controller@90 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x90 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "nub_gpio"; + apple,always-on; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi new file mode 100644 index 0000000000000..73f66cbff36d3 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -0,0 +1,570 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T6040 "M4 Pro" SoC + * + * Unit addresses are the Apple Device Tree's /arm-io addresses plus the + * 0x2_00000000 arm-io base. The nodes sit at the root, not under a + * simple-bus: the boot loader edits several of them by path. The blocks + * known to need non-posted writes carry nonposted-mmio themselves. + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include +#include +#include + +/ { + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + /* + * The clusters are MPIDR Aff1, which are also the L2 groups. + * capacity-dmips-mhz comes from pinned single-core throughput + * at the lowest p-state (E 1018 MHz, P 1257 MHz): E/P is 0.652 + * per MHz, so E 668 and P 1024. + */ + cpu-map { + cluster0 { + core0 { + cpu = <&cpu_e0>; + }; + core1 { + cpu = <&cpu_e1>; + }; + core2 { + cpu = <&cpu_e2>; + }; + core3 { + cpu = <&cpu_e3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu_p00>; + }; + core1 { + cpu = <&cpu_p01>; + }; + core2 { + cpu = <&cpu_p02>; + }; + core3 { + cpu = <&cpu_p03>; + }; + core4 { + cpu = <&cpu_p04>; + }; + }; + + cluster2 { + core0 { + cpu = <&cpu_p10>; + }; + core1 { + cpu = <&cpu_p11>; + }; + core2 { + cpu = <&cpu_p12>; + }; + core3 { + cpu = <&cpu_p13>; + }; + core4 { + cpu = <&cpu_p14>; + }; + }; + }; + + cpu_e0: cpu@0 { + compatible = "apple,brava-e"; + device_type = "cpu"; + reg = <0x0 0x0>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_e>; + capacity-dmips-mhz = <668>; + }; + + cpu_e1: cpu@1 { + compatible = "apple,brava-e"; + device_type = "cpu"; + reg = <0x0 0x1>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_e>; + capacity-dmips-mhz = <668>; + }; + + cpu_e2: cpu@2 { + compatible = "apple,brava-e"; + device_type = "cpu"; + reg = <0x0 0x2>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_e>; + capacity-dmips-mhz = <668>; + }; + + cpu_e3: cpu@3 { + compatible = "apple,brava-e"; + device_type = "cpu"; + reg = <0x0 0x3>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_e>; + capacity-dmips-mhz = <668>; + }; + + /* The boot CPU: the boot loader enters the kernel on it. */ + cpu_p00: cpu@10100 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10100>; + next-level-cache = <&l2_cache_p0>; + capacity-dmips-mhz = <1024>; + }; + + cpu_p01: cpu@10101 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10101>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p0>; + capacity-dmips-mhz = <1024>; + }; + + cpu_p02: cpu@10102 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10102>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p0>; + capacity-dmips-mhz = <1024>; + }; + + cpu_p03: cpu@10103 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10103>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p0>; + capacity-dmips-mhz = <1024>; + }; + + cpu_p04: cpu@10104 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10104>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p0>; + capacity-dmips-mhz = <1024>; + }; + + cpu_p10: cpu@10200 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10200>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p1>; + capacity-dmips-mhz = <1024>; + }; + + cpu_p11: cpu@10201 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10201>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p1>; + capacity-dmips-mhz = <1024>; + }; + + cpu_p12: cpu@10202 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10202>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p1>; + capacity-dmips-mhz = <1024>; + }; + + cpu_p13: cpu@10203 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10203>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p1>; + capacity-dmips-mhz = <1024>; + }; + + cpu_p14: cpu@10204 { + compatible = "apple,brava-p"; + device_type = "cpu"; + reg = <0x0 0x10204>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + next-level-cache = <&l2_cache_p1>; + capacity-dmips-mhz = <1024>; + }; + }; + + l2_cache_e: l2-cache-cluster0 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x400000>; + }; + + l2_cache_p0: l2-cache-cluster1 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x1000000>; + }; + + l2_cache_p1: l2-cache-cluster2 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x1000000>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&aic>; + interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt"; + interrupts = , + , + , + ; + }; + + /* The 24 MHz reference clock (ADT clock-ids 4) of the I2C, PWM and watchdog blocks */ + clkref: clock-ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "clkref"; + }; + + /* iBoot leaves the I2C gates on and the pins muxed to I2C. */ + i2c1: i2c@429014000 { + compatible = "apple,t6041-i2c", "apple,t8103-i2c"; + reg = <0x4 0x29014000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@429018000 { + compatible = "apple,t6041-i2c", "apple,t8103-i2c"; + reg = <0x4 0x29018000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c2>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c3: i2c@42901c000 { + compatible = "apple,t6041-i2c", "apple,t8103-i2c"; + reg = <0x4 0x2901c000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c4: i2c@429020000 { + compatible = "apple,t6041-i2c", "apple,t8103-i2c"; + reg = <0x4 0x29020000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c4_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c4>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c6: i2c@429028000 { + compatible = "apple,t6041-i2c", "apple,t8103-i2c"; + reg = <0x4 0x29028000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c6_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c6>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c8: i2c@429030000 { + compatible = "apple,t6041-i2c", "apple,t8103-i2c"; + reg = <0x4 0x29030000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c8_pins>; + pinctrl-names = "default"; + power-domains = <&ps_i2c8>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + fpwm0: pwm@429040000 { + compatible = "apple,t6041-fpwm", "apple,s5l-fpwm"; + reg = <0x4 0x29040000 0x0 0x4000>; + clocks = <&clkref>; + power-domains = <&ps_fpwm0>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pmgr: power-management@502280000 { + compatible = "apple,t6041-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x5 0x02280000 0x0 0x4000>; + /* child nodes are added in t6040-pmgr.dtsi */ + }; + + aic: interrupt-controller@502400000 { + compatible = "apple,t6041-aic3", "apple,t8122-aic3"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x5 0x02400000 0x0 0x184000>, + <0x5 0x02440000 0x0 0x4>; + reg-names = "core", "event"; + }; + + pmgr_aux: power-management@502800000 { + compatible = "apple,t6041-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x5 0x02800000 0x0 0x4000>; + /* child nodes are added in t6040-pmgr.dtsi */ + }; + + /* + * The always-on GPIO bank (ADT /arm-io/nub-gpio0, 61 pins). Its power + * state is in the always-on PMGR. + */ + pinctrl_nub: pinctrl@5081e4000 { + compatible = "apple,t6041-pinctrl", "apple,t8103-pinctrl"; + reg = <0x5 0x081e4000 0x0 0x4000>; + power-domains = <&ps_nub_gpio>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_nub 0 0 61>; + apple,npins = <61>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + status = "disabled"; + }; + + pmgr_mini: power-management@508300000 { + compatible = "apple,t6041-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x5 0x08300000 0x0 0x4000>; + /* child nodes are added in t6040-pmgr.dtsi */ + }; + + /* + * The driver arms the reset only when userspace opens /dev/watchdog + * or the firmware left it running; it also provides restart. + */ + wdt: watchdog@50836c000 { + compatible = "apple,t6041-wdt", "apple,t8103-wdt"; + reg = <0x5 0x0836c000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + }; + + nub_spmi0: spmi@509014000 { + compatible = "apple,t6041-spmi", "apple,t8103-spmi"; + reg = <0x5 0x09014000 0x0 0x100>; + #address-cells = <2>; + #size-cells = <0>; + status = "disabled"; + + pmic@e { + compatible = "apple,abbey-pmic", "apple,spmi-nvmem"; + reg = <0xe SPMI_USID>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + rtc_offset: rtc-offset@2100 { + reg = <0x2100 0x6>; + }; + + boot_stage: boot-stage@f801 { + reg = <0xf801 0x1>; + }; + + boot_error_count: boot-error-count@f802,0 { + reg = <0xf802 0x1>; + bits = <0 4>; + }; + + panic_count: panic-count@f802,4 { + reg = <0xf802 0x1>; + bits = <4 4>; + }; + + shutdown_flag: shutdown-flag@f80f,3 { + reg = <0xf80f 0x1>; + bits = <3 1>; + }; + }; + }; + }; + + smc: smc@50c600000 { + compatible = "apple,t6041-smc", "apple,t8103-smc", "apple,smc"; + reg = <0x5 0x0c600000 0x0 0x4000>, + <0x5 0x0de70000 0x0 0x100000>; + reg-names = "smc", "sram"; + mboxes = <&smc_mbox>; + status = "disabled"; + + smc_gpio: gpio { + compatible = "apple,smc-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + + smc_reboot: reboot { + compatible = "apple,smc-reboot"; + nvmem-cells = <&shutdown_flag>, <&boot_stage>, + <&boot_error_count>, <&panic_count>; + nvmem-cell-names = "shutdown_flag", "boot_stage", + "boot_error_count", "panic_count"; + }; + + smc_rtc: rtc { + compatible = "apple,smc-rtc"; + nvmem-cells = <&rtc_offset>; + nvmem-cell-names = "rtc_offset"; + }; + }; + + smc_mbox: mailbox@50c608000 { + compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x5 0x0c608000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + #mbox-cells = <0>; + status = "disabled"; + }; + + pinctrl: pinctrl@51c000000 { + compatible = "apple,t6041-pinctrl", "apple,t8103-pinctrl"; + reg = <0x5 0x1c000000 0x0 0x4000>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 200>; + apple,npins = <200>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + status = "disabled"; + + /* I2C is function 1 (ADT gpio-iic_scl/sda) */ + i2c1_pins: i2c1-pins { + pinmux = , + ; + }; + + i2c2_pins: i2c2-pins { + pinmux = , + ; + }; + + i2c3_pins: i2c3-pins { + pinmux = , + ; + }; + + i2c4_pins: i2c4-pins { + pinmux = , + ; + }; + + i2c6_pins: i2c6-pins { + pinmux = , + ; + }; + + i2c8_pins: i2c8-pins { + pinmux = , + ; + }; + }; +}; + +#include "t6040-pmgr.dtsi" From c7dfa2742910aa5df1f3896380004bc4659557f2 Mon Sep 17 00:00:00 2001 From: Josh Rodd Date: Mon, 21 Sep 2026 07:42:37 -0400 Subject: [PATCH 03/16] arm64: dts: apple: t6040: Add MTP (keyboard, trackpad) support Add the T6040 MTP (keyboard, trackpad) for the MacBook Pro J616s: the MTP, its mailbox and DART, and the DockChannel HID. Signed-off-by: Josh Rodd Assisted-by: oh-my-pi:gpt-6-astra [jg: the device-tree part of "Add MacBook Air M4 MTP (keyboard, trackpad) support." (t8132.dtsi/t8132-j715.dts), carried to T6040 for the MacBook Pro J616s: the MTP, its mailbox and DART and the DockChannel HID nodes with this SoC's addresses and interrupts from the J616s ADT; the DART stream aliases as apple,remap-streams, the binding the aurora DART driver reads; the J616s multi-touch firmware name and keyboard layout id added. Adapted to the layout of the T8140 tree: the nodes disabled in t6040.dtsi and enabled in the board file, the HID function nodes and the keyboard alias in the board file. The trackpad AFE's SMC power key (apple,afe-smc) is left out, as no binding describes it yet. The T6041 MTP and DockChannel compatibles are documented in the first patch of this series.] Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-j616s.dts | 43 ++++++++++++++ arch/arm64/boot/dts/apple/t6040.dtsi | 69 +++++++++++++++++++++++ 2 files changed, 112 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts index 30c91d46d3398..7eeb63753d03d 100644 --- a/arch/arm64/boot/dts/apple/t6040-j616s.dts +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -18,6 +18,10 @@ model = "Apple MacBook Pro (16-inch, M4 Pro, Nov 2024)"; chassis-type = "laptop"; + aliases { + keyboard = &keyboard; + }; + chosen { #address-cells = <2>; #size-cells = <2>; @@ -92,3 +96,42 @@ &i2c6 { status = "okay"; }; + +&mtp { + status = "okay"; +}; + +&mtp_mbox { + status = "okay"; +}; + +&mtp_dart { + status = "okay"; +}; + +&mtp_dockchannel { + status = "okay"; +}; + +&mtp_hid { + multi-touch { + firmware-name = "apple/tpmtfw-j616s.bin"; + }; + + keyboard: keyboard { + hid-country-code = <0>; + apple,keyboard-layout-id = <2>; + }; + + stm { + }; + + actuator { + }; + + tp-accel { + }; + + mtp { + }; +}; diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi index 73f66cbff36d3..cf9c2c0e3aa7b 100644 --- a/arch/arm64/boot/dts/apple/t6040.dtsi +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -513,6 +513,75 @@ status = "disabled"; }; + mtp: mtp@514600000 { + compatible = "apple,t6041-mtp", "apple,t6041-rtk-helper-asc4", + "apple,mtp", "apple,rtk-helper-asc4"; + reg = <0x5 0x14600000 0x0 0x4000>; + reg-names = "asc"; + mboxes = <&mtp_mbox>; + iommus = <&mtp_dart 0>; + #helper-cells = <0>; + status = "disabled"; + }; + + mtp_mbox: mailbox@514608000 { + compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x5 0x14608000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + #mbox-cells = <0>; + status = "disabled"; + }; + + mtp_dart: iommu@514800000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x5 0x14800000 0x0 0xc000>; + interrupt-parent = <&aic>; + interrupts = ; + #iommu-cells = <1>; + /* ADT "remap": streams 1 2 3 are stream 0 */ + apple,remap-streams = <1 0>, <2 0>, <3 0>; + status = "disabled"; + }; + + mtp_dockchannel: fifo@514b14000 { + compatible = "apple,t6041-dockchannel", "apple,dockchannel"; + reg = <0x5 0x14b14000 0x0 0x1000>; + reg-names = "irq"; + interrupt-parent = <&aic>; + interrupts = ; + + ranges = <0x0 0x5 0x14b28000 0x10000>; + nonposted-mmio; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + + mtp_hid: input@0 { + compatible = "apple,t6041-dockchannel-hid", "apple,dockchannel-hid"; + reg = <0x0000 0x1000>, + <0x4000 0x1000>, + <0x8000 0x1000>, + <0xc000 0x1000>; + reg-names = "rmt-config", "rmt-data", "config", "data"; + iommus = <&mtp_dart 0>; + interrupt-parent = <&mtp_dockchannel>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>, + <3 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tx", "rx"; + apple,fifo-size = <0x800>; + apple,helper-cpu = <&mtp>; + }; + }; + pinctrl: pinctrl@51c000000 { compatible = "apple,t6041-pinctrl", "apple,t8103-pinctrl"; reg = <0x5 0x1c000000 0x0 0x4000>; From 71577e6af0bf424332c5520375a93fdd2408ab00 Mon Sep 17 00:00:00 2001 From: CJ Damsleth Date: Thu, 30 Jul 2026 00:27:44 +0200 Subject: [PATCH 04/16] arm64: dts: apple: t6040: add cluster cpufreq and OPP tables T6040 cluster cpufreq + OPP tables. Cluster DVFS bases are m1n1-proven; OPP freqs/levels decoded from the live J614s ADT /arm-io/pmgr/voltage-states{1,5,13}-sram (word0 = kHz): E 7 pstates 1020-2592 MHz, P 19 pstates 1260-4512 MHz. Verified live 2026-07-30: E and P0 policies register and transition both directions. P1 gets its OWN operating-points-v2 node even though its frequencies are identical to P0's: `opp-shared` declares one clock/voltage domain per table, and the two P clusters have separate performance-domains. Signed-off-by: CJ Damsleth [jg: dts/t6040-cpufreq.dtsi from https://github.com/damsleth/wallace commit 90ea03566545 ("006 SOLVED: 32-bit freq*1000 overflow killed every M4 P-cluster cpufreq policy"), carried to the J616s (same SoC, same DVFS blocks and voltage states). In the T8140 tree layout: the cluster nodes and opp-table-e/p0/p1 in t6040.dtsi, at the root and so with nonposted-mmio on each block; operating-points-v2 and performance-domains in the CPU nodes; apple,t6041-cluster-cpufreq in front of apple,t8112-cluster-cpufreq.] Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040.dtsi | 254 +++++++++++++++++++++++++++ 1 file changed, 254 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi index cf9c2c0e3aa7b..5a97e9d3a57c5 100644 --- a/arch/arm64/boot/dts/apple/t6040.dtsi +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -90,7 +90,9 @@ enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ next-level-cache = <&l2_cache_e>; + operating-points-v2 = <&opp_e>; capacity-dmips-mhz = <668>; + performance-domains = <&cpufreq_e>; }; cpu_e1: cpu@1 { @@ -100,7 +102,9 @@ enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ next-level-cache = <&l2_cache_e>; + operating-points-v2 = <&opp_e>; capacity-dmips-mhz = <668>; + performance-domains = <&cpufreq_e>; }; cpu_e2: cpu@2 { @@ -110,7 +114,9 @@ enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ next-level-cache = <&l2_cache_e>; + operating-points-v2 = <&opp_e>; capacity-dmips-mhz = <668>; + performance-domains = <&cpufreq_e>; }; cpu_e3: cpu@3 { @@ -120,7 +126,9 @@ enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ next-level-cache = <&l2_cache_e>; + operating-points-v2 = <&opp_e>; capacity-dmips-mhz = <668>; + performance-domains = <&cpufreq_e>; }; /* The boot CPU: the boot loader enters the kernel on it. */ @@ -129,7 +137,9 @@ device_type = "cpu"; reg = <0x0 0x10100>; next-level-cache = <&l2_cache_p0>; + operating-points-v2 = <&opp_p0>; capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p0>; }; cpu_p01: cpu@10101 { @@ -139,7 +149,9 @@ enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ next-level-cache = <&l2_cache_p0>; + operating-points-v2 = <&opp_p0>; capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p0>; }; cpu_p02: cpu@10102 { @@ -149,7 +161,9 @@ enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ next-level-cache = <&l2_cache_p0>; + operating-points-v2 = <&opp_p0>; capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p0>; }; cpu_p03: cpu@10103 { @@ -159,7 +173,9 @@ enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ next-level-cache = <&l2_cache_p0>; + operating-points-v2 = <&opp_p0>; capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p0>; }; cpu_p04: cpu@10104 { @@ -169,7 +185,9 @@ enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ next-level-cache = <&l2_cache_p0>; + operating-points-v2 = <&opp_p0>; capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p0>; }; cpu_p10: cpu@10200 { @@ -179,7 +197,9 @@ enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ next-level-cache = <&l2_cache_p1>; + operating-points-v2 = <&opp_p1>; capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p1>; }; cpu_p11: cpu@10201 { @@ -189,7 +209,9 @@ enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ next-level-cache = <&l2_cache_p1>; + operating-points-v2 = <&opp_p1>; capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p1>; }; cpu_p12: cpu@10202 { @@ -199,7 +221,9 @@ enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ next-level-cache = <&l2_cache_p1>; + operating-points-v2 = <&opp_p1>; capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p1>; }; cpu_p13: cpu@10203 { @@ -209,7 +233,9 @@ enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ next-level-cache = <&l2_cache_p1>; + operating-points-v2 = <&opp_p1>; capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p1>; }; cpu_p14: cpu@10204 { @@ -219,7 +245,9 @@ enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ next-level-cache = <&l2_cache_p1>; + operating-points-v2 = <&opp_p1>; capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p1>; }; }; @@ -244,6 +272,211 @@ cache-size = <0x1000000>; }; + /* + * DVFS states from the ADT: /arm-io/pmgr voltage-states1-sram (E), + * voltage-states5-sram (P0) and voltage-states13-sram (P1), word 0 + * in kHz. opp-level is the hardware p-state. Each P cluster has its + * own table even though the frequencies are the same: opp-shared + * means one clock domain per table. + */ + opp_e: opp-table-e { + compatible = "operating-points-v2"; + opp-shared; + + opp01 { + opp-hz = /bits/ 64 <1020000000>; + opp-level = <1>; + }; + opp02 { + opp-hz = /bits/ 64 <1404000000>; + opp-level = <2>; + }; + opp03 { + opp-hz = /bits/ 64 <1788000000>; + opp-level = <3>; + }; + opp04 { + opp-hz = /bits/ 64 <2112000000>; + opp-level = <4>; + }; + opp05 { + opp-hz = /bits/ 64 <2352000000>; + opp-level = <5>; + }; + opp06 { + opp-hz = /bits/ 64 <2532000000>; + opp-level = <6>; + }; + opp07 { + opp-hz = /bits/ 64 <2592000000>; + opp-level = <7>; + }; + }; + + opp_p0: opp-table-p0 { + compatible = "operating-points-v2"; + opp-shared; + + opp01 { + opp-hz = /bits/ 64 <1260000000>; + opp-level = <1>; + }; + opp02 { + opp-hz = /bits/ 64 <1512000000>; + opp-level = <2>; + }; + opp03 { + opp-hz = /bits/ 64 <1800000000>; + opp-level = <3>; + }; + opp04 { + opp-hz = /bits/ 64 <2088000000>; + opp-level = <4>; + }; + opp05 { + opp-hz = /bits/ 64 <2352000000>; + opp-level = <5>; + }; + opp06 { + opp-hz = /bits/ 64 <2616000000>; + opp-level = <6>; + }; + opp07 { + opp-hz = /bits/ 64 <2868000000>; + opp-level = <7>; + }; + opp08 { + opp-hz = /bits/ 64 <3096000000>; + opp-level = <8>; + }; + opp09 { + opp-hz = /bits/ 64 <3300000000>; + opp-level = <9>; + }; + opp10 { + opp-hz = /bits/ 64 <3468000000>; + opp-level = <10>; + }; + opp11 { + opp-hz = /bits/ 64 <3624000000>; + opp-level = <11>; + }; + opp12 { + opp-hz = /bits/ 64 <3756000000>; + opp-level = <12>; + }; + opp13 { + opp-hz = /bits/ 64 <3852000000>; + opp-level = <13>; + }; + opp14 { + opp-hz = /bits/ 64 <3924000000>; + opp-level = <14>; + }; + opp15 { + opp-hz = /bits/ 64 <3996000000>; + opp-level = <15>; + }; + opp16 { + opp-hz = /bits/ 64 <4044000000>; + opp-level = <16>; + }; + opp17 { + opp-hz = /bits/ 64 <4104000000>; + opp-level = <17>; + }; + opp18 { + opp-hz = /bits/ 64 <4416000000>; + opp-level = <18>; + }; + opp19 { + opp-hz = /bits/ 64 <4512000000>; + opp-level = <19>; + }; + }; + + opp_p1: opp-table-p1 { + compatible = "operating-points-v2"; + opp-shared; + + opp01 { + opp-hz = /bits/ 64 <1260000000>; + opp-level = <1>; + }; + opp02 { + opp-hz = /bits/ 64 <1512000000>; + opp-level = <2>; + }; + opp03 { + opp-hz = /bits/ 64 <1800000000>; + opp-level = <3>; + }; + opp04 { + opp-hz = /bits/ 64 <2088000000>; + opp-level = <4>; + }; + opp05 { + opp-hz = /bits/ 64 <2352000000>; + opp-level = <5>; + }; + opp06 { + opp-hz = /bits/ 64 <2616000000>; + opp-level = <6>; + }; + opp07 { + opp-hz = /bits/ 64 <2868000000>; + opp-level = <7>; + }; + opp08 { + opp-hz = /bits/ 64 <3096000000>; + opp-level = <8>; + }; + opp09 { + opp-hz = /bits/ 64 <3300000000>; + opp-level = <9>; + }; + opp10 { + opp-hz = /bits/ 64 <3468000000>; + opp-level = <10>; + }; + opp11 { + opp-hz = /bits/ 64 <3624000000>; + opp-level = <11>; + }; + opp12 { + opp-hz = /bits/ 64 <3756000000>; + opp-level = <12>; + }; + opp13 { + opp-hz = /bits/ 64 <3852000000>; + opp-level = <13>; + }; + opp14 { + opp-hz = /bits/ 64 <3924000000>; + opp-level = <14>; + }; + opp15 { + opp-hz = /bits/ 64 <3996000000>; + opp-level = <15>; + }; + opp16 { + opp-hz = /bits/ 64 <4044000000>; + opp-level = <16>; + }; + opp17 { + opp-hz = /bits/ 64 <4104000000>; + opp-level = <17>; + }; + opp18 { + opp-hz = /bits/ 64 <4416000000>; + opp-level = <18>; + }; + opp19 { + opp-hz = /bits/ 64 <4512000000>; + opp-level = <19>; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupt-parent = <&aic>; @@ -262,6 +495,27 @@ clock-output-names = "clkref"; }; + cpufreq_e: cpufreq@210e20000 { + compatible = "apple,t6041-cluster-cpufreq", "apple,t8112-cluster-cpufreq"; + reg = <0x2 0x10e20000 0x0 0x1000>; + nonposted-mmio; + #performance-domain-cells = <0>; + }; + + cpufreq_p0: cpufreq@211e20000 { + compatible = "apple,t6041-cluster-cpufreq", "apple,t8112-cluster-cpufreq"; + reg = <0x2 0x11e20000 0x0 0x1000>; + nonposted-mmio; + #performance-domain-cells = <0>; + }; + + cpufreq_p1: cpufreq@212e20000 { + compatible = "apple,t6041-cluster-cpufreq", "apple,t8112-cluster-cpufreq"; + reg = <0x2 0x12e20000 0x0 0x1000>; + nonposted-mmio; + #performance-domain-cells = <0>; + }; + /* iBoot leaves the I2C gates on and the pins muxed to I2C. */ i2c1: i2c@429014000 { compatible = "apple,t6041-i2c", "apple,t8103-i2c"; From 53be621e4f4411f24d8eb8fa857d31ec716eec6d Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:50 -0300 Subject: [PATCH 05/16] arm64: dts: apple: t6040: Add the cpuidle node Describe the CPU idle controller so the Apple cpuidle driver binds on T6040, and enable it on the J616s. Idle states are not described: the hardware power-gates a core in WFI on its own and software cannot request a deeper state. Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-j616s.dts | 4 ++++ arch/arm64/boot/dts/apple/t6040.dtsi | 5 +++++ 2 files changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts index 7eeb63753d03d..7452646917d3f 100644 --- a/arch/arm64/boot/dts/apple/t6040-j616s.dts +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -60,6 +60,10 @@ }; }; +&cpuidle { + status = "okay"; +}; + &smc { status = "okay"; }; diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi index 5a97e9d3a57c5..a232e0c9bb382 100644 --- a/arch/arm64/boot/dts/apple/t6040.dtsi +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -20,6 +20,11 @@ #address-cells = <2>; #size-cells = <2>; + cpuidle: cpuidle { + compatible = "apple,t6041-cpuidle"; + status = "disabled"; + }; + cpus { #address-cells = <2>; #size-cells = <0>; From 1a5695ea46b36ec15236ed386052387c688bacfd Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:50 -0300 Subject: [PATCH 06/16] arm64: dts: apple: t6040-j616s: Add the SMC sensors and a CPU die thermal zone Add the SMC hwmon node with the CPU die temperature (key TCMz, the maximum of the CPU die sensors) as sensor 0, and a thermal zone with the three cpufreq policies as cooling devices (#cooling-cells on every CPU, as the cooling device belongs to a cluster's policy CPU). The SMC refreshes TCMz about once a second, hence 1 s polling. The PMP's fast die-temperature limit regulates the die (under full load TCMz settles near 111 C), so the zone is a backstop above it: a passive trip at 113 C with 5 C hysteresis and a critical trip at 118 C for an orderly shutdown. A passive trip at 95 C held the die below the PMP's target and throttled the E cluster for nothing. The J616s has two fans, and its SMC has every key of the shared common and laptop sensor lists, so include hwmon-common, hwmon-fan-dual and hwmon-laptop as the M3 Pro/Max MacBook Pros do. They only append after TCMz, so it stays sensor 0. The fans stay read-only unless macsmc_hwmon's fan_control parameter is set. The sensor and zone layout follow Kb2uka's J713 overlays (Omarchy-M4-Native). Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-j616s.dts | 79 +++++++++++++++++++++++ arch/arm64/boot/dts/apple/t6040.dtsi | 19 ++++++ 2 files changed, 98 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts index 7452646917d3f..38c9da6a6bacb 100644 --- a/arch/arm64/boot/dts/apple/t6040-j616s.dts +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -12,6 +12,7 @@ #include "t6040.dtsi" #include #include +#include / { compatible = "apple,j616s", "apple,t6040", "apple,arm-platform"; @@ -58,6 +59,67 @@ max-brightness = <255>; }; }; + + /* + * CPU die temperature: SMC key TCMz (CPU die max), sensor 0 of + * smc_hwmon. The PMP's fast die-temperature limit regulates (TCMz + * settles near 111 C); this zone is the backstop above it: passive at + * 113 C, critical (orderly shutdown) at 118 C, polled once a second as + * the SMC refreshes TCMz. The cpufreq cooling device sits on a + * cluster's policy CPU, so each map lists every CPU of its cluster. + */ + thermal-zones { + cpu-die-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + thermal-sensors = <&smc_hwmon 0>; /* TCMz */ + + trips { + cpu_die_passive: cpu-die-passive { + temperature = <113000>; + hysteresis = <5000>; + type = "passive"; + }; + + cpu-die-critical { + temperature = <118000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-e { + trip = <&cpu_die_passive>; + cooling-device = + <&cpu_e0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map-p0 { + trip = <&cpu_die_passive>; + cooling-device = + <&cpu_p00 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p01 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p02 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p03 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p04 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map-p1 { + trip = <&cpu_die_passive>; + cooling-device = + <&cpu_p10 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p11 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p12 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p13 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p14 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; }; &cpuidle { @@ -139,3 +201,20 @@ mtp { }; }; + +&smc_hwmon { + /* + * TCMz must stay the first temperature child: the thermal zone names + * the sensor by its index, so the shared hwmon includes below only + * append after it. + */ + temperature-TCMz { + apple,key-id = "TCMz"; + label = "CPU Die Max"; + }; +}; + +/* Read-only fan speeds and more SMC sensors; every key exists on this machine's SMC. */ +#include "hwmon-common.dtsi" +#include "hwmon-fan-dual.dtsi" +#include "hwmon-laptop.dtsi" diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi index a232e0c9bb382..c2beab04bea95 100644 --- a/arch/arm64/boot/dts/apple/t6040.dtsi +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -98,6 +98,7 @@ operating-points-v2 = <&opp_e>; capacity-dmips-mhz = <668>; performance-domains = <&cpufreq_e>; + #cooling-cells = <2>; }; cpu_e1: cpu@1 { @@ -110,6 +111,7 @@ operating-points-v2 = <&opp_e>; capacity-dmips-mhz = <668>; performance-domains = <&cpufreq_e>; + #cooling-cells = <2>; }; cpu_e2: cpu@2 { @@ -122,6 +124,7 @@ operating-points-v2 = <&opp_e>; capacity-dmips-mhz = <668>; performance-domains = <&cpufreq_e>; + #cooling-cells = <2>; }; cpu_e3: cpu@3 { @@ -134,6 +137,7 @@ operating-points-v2 = <&opp_e>; capacity-dmips-mhz = <668>; performance-domains = <&cpufreq_e>; + #cooling-cells = <2>; }; /* The boot CPU: the boot loader enters the kernel on it. */ @@ -145,6 +149,7 @@ operating-points-v2 = <&opp_p0>; capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p0>; + #cooling-cells = <2>; }; cpu_p01: cpu@10101 { @@ -157,6 +162,7 @@ operating-points-v2 = <&opp_p0>; capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p0>; + #cooling-cells = <2>; }; cpu_p02: cpu@10102 { @@ -169,6 +175,7 @@ operating-points-v2 = <&opp_p0>; capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p0>; + #cooling-cells = <2>; }; cpu_p03: cpu@10103 { @@ -181,6 +188,7 @@ operating-points-v2 = <&opp_p0>; capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p0>; + #cooling-cells = <2>; }; cpu_p04: cpu@10104 { @@ -193,6 +201,7 @@ operating-points-v2 = <&opp_p0>; capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p0>; + #cooling-cells = <2>; }; cpu_p10: cpu@10200 { @@ -205,6 +214,7 @@ operating-points-v2 = <&opp_p1>; capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p1>; + #cooling-cells = <2>; }; cpu_p11: cpu@10201 { @@ -217,6 +227,7 @@ operating-points-v2 = <&opp_p1>; capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p1>; + #cooling-cells = <2>; }; cpu_p12: cpu@10202 { @@ -229,6 +240,7 @@ operating-points-v2 = <&opp_p1>; capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p1>; + #cooling-cells = <2>; }; cpu_p13: cpu@10203 { @@ -241,6 +253,7 @@ operating-points-v2 = <&opp_p1>; capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p1>; + #cooling-cells = <2>; }; cpu_p14: cpu@10204 { @@ -253,6 +266,7 @@ operating-points-v2 = <&opp_p1>; capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p1>; + #cooling-cells = <2>; }; }; @@ -743,6 +757,11 @@ #gpio-cells = <2>; }; + smc_hwmon: hwmon { + compatible = "apple,smc-hwmon"; + #thermal-sensor-cells = <1>; + }; + smc_reboot: reboot { compatible = "apple,smc-reboot"; nvmem-cells = <&shutdown_flag>, <&boot_stage>, From f2a8c9621d0cbed75c6ff88cd9313f6cccc661c8 Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:51 -0300 Subject: [PATCH 07/16] arm64: dts: apple: t6040-j616s: Add Wi-Fi and Bluetooth Add the PCIe controller with its DART and the BCM4388 behind its port 0: Wi-Fi on function 0 and Bluetooth on function 1 (board type hostomel), the port's power enable on SMC GPIO 0x13, its reset on AP pin 4 and the CLKREQ pin. The boot loader adds the per-unit Wi-Fi calibration and antenna SKU and the Bluetooth address and beamforming calibration to these nodes, and its Bluetooth admission depends on the node as it is, so the PCIe node is the booted tree's, unchanged apart from naming the AIC in msi-ranges by label. Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-j616s.dts | 67 +++++++++++++++++++++++ arch/arm64/boot/dts/apple/t6040.dtsi | 9 +++ 2 files changed, 76 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts index 38c9da6a6bacb..9ac2e4452e506 100644 --- a/arch/arm64/boot/dts/apple/t6040-j616s.dts +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -21,6 +21,8 @@ aliases { keyboard = &keyboard; + wifi0 = "/pcie@1cb0000000/pci@0,0/wifi@0,0"; + bluetooth0 = "/pcie@1cb0000000/pci@0,0/bluetooth@0,1"; }; chosen { @@ -140,6 +142,10 @@ &pinctrl { status = "okay"; + + wifi_clkreq: wifi-clkreq { + pinmux = ; + }; }; /* @@ -218,3 +224,64 @@ #include "hwmon-common.dtsi" #include "hwmon-fan-dual.dtsi" #include "hwmon-laptop.dtsi" + +&pcie_dart { + status = "okay"; +}; + +/* + * Wi-Fi and Bluetooth (BCM4388). The boot loader adds the per-unit + * calibration and Bluetooth address to these nodes, and its Bluetooth + * admission depends on this node exactly as it is; it is kept as the + * booted tree has it. + */ +/ { + pcie0: pcie@1cb0000000 { + compatible = "apple,t6041-pcie", "apple,t6020-pcie"; + reg = <0x1c 0xb0000000 0 0x1000000 4 0x14000000 0 0x4000 4 0x10028000 0 0x4000 4 0x17020000 0 0x4000>; + reg-names = "config", "rc", "port0", "phy0"; + ranges = <0x43000000 0xb 0xc0000000 0xb 0xc0000000 0 0x20000000 0x2000000 0 0x80000000 0xb 0x80000000 0 0x40000000>; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_clkreq>; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0 1>; + iommu-map-mask = <0xffff>; + iommu-map = <0x100 &pcie_dart 1 2>; + msi-ranges = <&aic AIC_IRQ 2071 IRQ_TYPE_EDGE_RISING 32>; + msi-parent = <&pcie0>; + msi-controller; + interrupts = <0 0x6bb 4>; + interrupt-parent = <&aic>; + device_type = "pci"; + + port00: pci@0,0 { + compatible = "pciclass,0604"; + reg = <0 0 0 0 0>; + ranges; + interrupt-map = <0 0 0 1 &port00 0 0 0 0 0 0 0 2 &port00 0 0 0 1 0 0 0 3 &port00 0 0 0 2 0 0 0 4 &port00 0 0 0 3>; + interrupt-map-mask = <0 0 0 7>; + #interrupt-cells = <1>; + interrupt-controller; + #size-cells = <2>; + #address-cells = <3>; + pwren-gpios = <&smc_gpio 0x13 0>; + reset-gpios = <&pinctrl 4 1>; + device_type = "pci"; + + bluetooth@0,1 { + compatible = "pci14e4,5f72"; + reg = <0x100 0 0 0 0>; + brcm,board-type = "apple,hostomel"; + status = "okay"; + }; + + wifi@0,0 { + compatible = "brcm,bcm4329-fmac"; + reg = <0 0 0 0 0>; + brcm,ccode-map-trivial; + brcm,board-type = "apple,hostomel"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi index c2beab04bea95..ea9bd42cf16f4 100644 --- a/arch/arm64/boot/dts/apple/t6040.dtsi +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -535,6 +535,15 @@ #performance-domain-cells = <0>; }; + pcie_dart: iommu@410000000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x4 0x10000000 0x0 0x20000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + status = "disabled"; + }; + /* iBoot leaves the I2C gates on and the pins muxed to I2C. */ i2c1: i2c@429014000 { compatible = "apple,t6041-i2c", "apple,t8103-i2c"; From a099c54e0ac507142d2bab789287c865cb16c160 Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:51 -0300 Subject: [PATCH 08/16] arm64: dts: apple: t6040: Add the NVMe controller Add the ANS2 NVMe controller with its mailbox, SART and power domains. The controller window, the ANS coprocessor and the separate NVMMU are from the J616s ADT; the three power domains are the ANS and the two APCIe system states, all on from boot. Binding: apple,t6041-nvme-ans2 from #387 ("nvme: apple: add T6040 (M4 Pro) ANS2 support"), apple,t6041-sart from the first patch of this series. Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-j616s.dts | 12 ++++++ arch/arm64/boot/dts/apple/t6040-pmgr.dtsi | 48 +++++++++++++++++++++++ arch/arm64/boot/dts/apple/t6040.dtsi | 39 ++++++++++++++++++ 3 files changed, 99 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts index 9ac2e4452e506..3716e62b0ca50 100644 --- a/arch/arm64/boot/dts/apple/t6040-j616s.dts +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -285,3 +285,15 @@ }; }; }; + +&ans_mbox { + status = "okay"; +}; + +&ans_sart { + status = "okay"; +}; + +&nvme { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi b/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi index 9186ddf5f3968..f957149a8a71c 100644 --- a/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi +++ b/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi @@ -8,6 +8,24 @@ */ &pmgr { + ps_apcie_st0: power-controller@108 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x108 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "apcie_st0"; + apple,always-on; + }; + + ps_apcie_st1: power-controller@110 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x110 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "apcie_st1"; + apple,always-on; + }; + ps_fab3_soc: power-controller@118 { compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; reg = <0x118 4>; @@ -90,6 +108,36 @@ label = "i2c8"; power-domains = <&ps_sio>; }; + + ps_ans: power-controller@370 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x370 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ans"; + power-domains = <&ps_fab3_soc>; + apple,always-on; + }; + + ps_apcie_sys_st0: power-controller@380 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x380 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "apcie_sys_st0"; + power-domains = <&ps_ans>, <&ps_apcie_st0>; + apple,always-on; + }; + + ps_apcie_sys_st1: power-controller@388 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x388 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "apcie_sys_st1"; + power-domains = <&ps_ans>, <&ps_apcie_st1>; + apple,always-on; + }; }; &pmgr_aux { diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi index ea9bd42cf16f4..0851828c8214c 100644 --- a/arch/arm64/boot/dts/apple/t6040.dtsi +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -535,6 +535,28 @@ #performance-domain-cells = <0>; }; + ans_mbox: mailbox@409608000 { + compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x4 0x09608000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + power-domains = <&ps_ans>; + #mbox-cells = <0>; + status = "disabled"; + }; + + ans_sart: sart@40dc50000 { + compatible = "apple,t6041-sart", "apple,t6000-sart"; + reg = <0x4 0x0dc50000 0x0 0xc000>; + power-domains = <&ps_ans>; + status = "disabled"; + }; + pcie_dart: iommu@410000000 { compatible = "apple,t6041-dart", "apple,t8110-dart"; reg = <0x4 0x10000000 0x0 0x20000>; @@ -638,6 +660,23 @@ status = "disabled"; }; + nvme: nvme@44dcc0000 { + compatible = "apple,t6041-nvme-ans2"; + reg = <0x4 0x4dcc0000 0x0 0x10000>, + <0x4 0x09600000 0x0 0x4000>, + <0x4 0x0dcc0000 0x0 0x60000>; + reg-names = "nvme", "ans", "nvmmu"; + interrupt-parent = <&aic>; + interrupts = ; + mboxes = <&ans_mbox>; + apple,sart = <&ans_sart>; + power-domains = <&ps_ans>, <&ps_apcie_sys_st0>, + <&ps_apcie_sys_st1>; + power-domain-names = "ans", "apcie0", "apcie1"; + resets = <&ps_ans>; + status = "disabled"; + }; + pmgr: power-management@502280000 { compatible = "apple,t6041-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd"; #address-cells = <1>; From 9af62cbf2d362afb6e1fcb7d0cf4aec33016241f Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:51 -0300 Subject: [PATCH 09/16] arm64: dts: apple: t6040: Add the video decoder Add the AVD, its DART and its AVD_SYS power state. The decoder's MCU firmware on this SoC programs the T8122/T8132 register family, so the node carries apple,t8132-avd as its fallback. The MCU only boots at the first decode job. The ADT describes the block as one range; the code, SRAM, mailbox and control windows follow the T6030/T8140 layout. The driver does not map the SRAM window. Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-pmgr.dtsi | 8 ++++++ arch/arm64/boot/dts/apple/t6040.dtsi | 30 +++++++++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi b/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi index f957149a8a71c..13339b2c5f907 100644 --- a/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi +++ b/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi @@ -141,6 +141,14 @@ }; &pmgr_aux { + ps_avd_sys: power-controller@170 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x170 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "avd_sys"; + }; + ps_afc: power-controller@178 { compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; reg = <0x178 4>; diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi index 0851828c8214c..5d5566536605b 100644 --- a/arch/arm64/boot/dts/apple/t6040.dtsi +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -535,6 +535,36 @@ #performance-domain-cells = <0>; }; + /* + * The decoder firmware programs the T8122/T8132 register family, so + * the driver binds through its T8132 entry. The ADT gives the whole + * block (0x2_80000000, 0x1404000); the windows follow the T6030/T8140 + * layout, with the CM3 SRAM between its code and the mailbox. + */ + avd: avd@280000000 { + compatible = "apple,t6041-avd", "apple,t8132-avd"; + reg = <0x2 0x81080000 0x0 0x14000>, + <0x2 0x81094000 0x0 0x14000>, + <0x2 0x810a8000 0x0 0x4000>, + <0x2 0x81100000 0x0 0x10000>; + reg-names = "code", "sram", "mbox", "ctrl"; + interrupt-parent = <&aic>; + interrupts = , + ; + power-domains = <&ps_avd_sys>; + resets = <&ps_avd_sys>; + iommus = <&avd_dart 0>; + }; + + avd_dart: iommu@281020000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x2 0x81020000 0x0 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_avd_sys>; + }; + ans_mbox: mailbox@409608000 { compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; reg = <0x4 0x09608000 0x0 0x4000>; From 9b96ba254c3050e4e6a44f9f5bc17e412f4726fc Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:51 -0300 Subject: [PATCH 10/16] arm64: dts: apple: t6040: Add the PMP and link the CPU clusters Add the PMP (power management coprocessor) of T6040, from the J616s ADT and the macOS 25G83 PMP, PTD and DART drivers: - the PMS, PMP and PMS_SRAM power states, always on; - the report region (PTD), with always-on entries for the three CPU clusters (soc-devices 10-12), for their fast die-temperature loops, and for the GPU (13). Each entry is a power-domain provider with the T6000 fallback the driver matches; - its DART (the ADT's first range; the second is the SoC's shared clock-protection block), its mailbox and the coprocessor, with the SoC-level boot arguments pmc = 1 and pmc-pmgr = 0x3f. iBoot locks the DART (PROTECT 0x1e7, SIDs 0 and 1 translating): apple-dart adopts the SID 0 table, and apple,dma-range keeps the IOVAs in the window iBoot built. Every report entry reads 0 while the PMP is stopped. The boot loader supplies the per-unit boot arguments and the firmware's tunables; without them the driver does not probe. The GPU entry matters: without the request the running PMP treats the GPU as off and holds it at its lowest performance state (338 MHz instead of about 1.58 GHz). T8140 has the same always-on entry. The three cluster cpufreq blocks get apple,fast-die-effort, the PMP's per-cluster fast die-temperature effort (lane 0 E, 1 P0, 2 P1), which apple-soc-cpufreq turns into a frequency limit. Until it finds the PMP running, the driver holds each cluster at its fallback state. Binding: lane 2 of apple,fast-die-effort from the first patch of this series. Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-j616s.dts | 16 ++++ arch/arm64/boot/dts/apple/t6040-pmgr.dtsi | 27 ++++++ arch/arm64/boot/dts/apple/t6040.dtsi | 112 ++++++++++++++++++++++ 3 files changed, 155 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts index 3716e62b0ca50..ffbbffcd77544 100644 --- a/arch/arm64/boot/dts/apple/t6040-j616s.dts +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -297,3 +297,19 @@ &nvme { status = "okay"; }; + +&pmp_dart { + status = "okay"; +}; + +&pmp_report { + status = "okay"; +}; + +&pmp { + status = "okay"; +}; + +&pmp_mbox { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi b/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi index 13339b2c5f907..a3c55e8b125ac 100644 --- a/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi +++ b/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi @@ -141,6 +141,15 @@ }; &pmgr_aux { + ps_pms: power-controller@100 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x100 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "pms"; + apple,always-on; + }; + ps_avd_sys: power-controller@170 { compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; reg = <0x170 4>; @@ -157,6 +166,24 @@ label = "afc"; apple,always-on; }; + + ps_pmp: power-controller@410 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x410 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "pmp"; + apple,always-on; + }; + + ps_pms_sram: power-controller@418 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x418 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "pms_sram"; + apple,always-on; + }; }; &pmgr_mini { diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi index 5d5566536605b..2a7dbc1e9fa5e 100644 --- a/arch/arm64/boot/dts/apple/t6040.dtsi +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -519,6 +519,8 @@ reg = <0x2 0x10e20000 0x0 0x1000>; nonposted-mmio; #performance-domain-cells = <0>; + /* PMP fast die-temperature effort, byte 0 of FAST-DIE-CE */ + apple,fast-die-effort = <&pmp_report 0>; }; cpufreq_p0: cpufreq@211e20000 { @@ -526,6 +528,7 @@ reg = <0x2 0x11e20000 0x0 0x1000>; nonposted-mmio; #performance-domain-cells = <0>; + apple,fast-die-effort = <&pmp_report 1>; }; cpufreq_p1: cpufreq@212e20000 { @@ -533,6 +536,7 @@ reg = <0x2 0x12e20000 0x0 0x1000>; nonposted-mmio; #performance-domain-cells = <0>; + apple,fast-die-effort = <&pmp_report 2>; }; /* @@ -707,6 +711,114 @@ status = "disabled"; }; + /* + * PMP (power management coprocessor). iBoot locks its DART (PROTECT + * 0x1e7, SIDs 0 and 1 translating): apple-dart adopts iBoot's SID 0 + * table and leaves SID 1 alone. apple,dma-range keeps Linux's IOVAs + * in the ADT window (vm-base 0x100_0000_0000, 64 GiB). The DART's + * second ADT range is the SoC's shared clock-protection block, not + * part of the DART. + */ + pmp_dart: iommu@500300000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x5 0x00300000 0x0 0xc000>; + interrupt-parent = <&aic>; + interrupts = ; + #iommu-cells = <1>; + apple,dma-range = <0x100 0x0 0x10 0x0>; + power-domains = <&ps_pmp>; + status = "disabled"; + }; + + /* + * Report (PTD) region: reads 16 bytes per entry at +0x0, writes 8 + * bytes per entry at +0x10000. Entries are PMP soc-devices; every + * entry reads 0 while the PMP is stopped. + */ + pmp_report: pmp-report@5003c0000 { + compatible = "apple,t6041-pmp-v2-report"; + reg = <0x5 0x003c0000 0x0 0x20000>; + nonposted-mmio; + power-domains = <&ps_pms_sram>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + /* The CPU clusters, for their fast die-temperature loops */ + report@a { + compatible = "apple,t6041-pmp-v2-report-entry", + "apple,t6000-pmp-v2-report-entry"; + reg = <0xa>; + label = "pmp-eacc0"; + #power-domain-cells = <0>; + apple,always-on; + }; + + report@b { + compatible = "apple,t6041-pmp-v2-report-entry", + "apple,t6000-pmp-v2-report-entry"; + reg = <0xb>; + label = "pmp-pacc0"; + #power-domain-cells = <0>; + apple,always-on; + }; + + report@c { + compatible = "apple,t6041-pmp-v2-report-entry", + "apple,t6000-pmp-v2-report-entry"; + reg = <0xc>; + label = "pmp-pacc1"; + #power-domain-cells = <0>; + apple,always-on; + }; + + /* + * The GPU (soc-device 13). Without it the running PMP treats + * the GPU as off and holds it at its lowest state. + */ + report@d { + compatible = "apple,t6041-pmp-v2-report-entry", + "apple,t6000-pmp-v2-report-entry"; + reg = <0xd>; + label = "pmp-gfx"; + #power-domain-cells = <0>; + apple,always-on; + }; + }; + + /* + * The boot loader adds the per-unit properties (board, DRAM) and the + * firmware tunables the driver needs before it starts the PMP. + */ + pmp: pmp@500700000 { + compatible = "apple,t6041-pmp-v2", "apple,t6000-pmp-v2"; + reg = <0x5 0x00700000 0x0 0xe0000>, + <0x5 0x00e00000 0x0 0x4000>; + reg-names = "pmp", "asc"; + mboxes = <&pmp_mbox>; + mbox-names = "mbox"; + iommus = <&pmp_dart 0>; + power-domains = <&ps_pmp>; + apple,pmc = <1>; + apple,pmc-pmgr = <0x3f>; + status = "disabled"; + }; + + pmp_mbox: mailbox@500e08000 { + compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x5 0x00e08000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + power-domains = <&ps_pmp>, <&ps_pms_sram>; + #mbox-cells = <0>; + status = "disabled"; + }; + pmgr: power-management@502280000 { compatible = "apple,t6041-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd"; #address-cells = <1>; From 26492e97f6e65eda7330bc501a60d34f3650e7df Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:52 -0300 Subject: [PATCH 11/16] arm64: dts: apple: t6040: Add the display controller Add the DCP, its mailbox and DARTs, the display subsystem node and the display's PMGR window, and the J616s panel (345 x 223 mm). All stay disabled: the boot loader enables them when it hands the display over, and also adds the firmware version and the DCP mapping pools. Binding: apple,t6041-dcp from the first patch of this series. The display handoff also needs #386 ("iommu/apple-dart: mirror the firmware's display mappings on T6040"). Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-j616s.dts | 12 ++++ arch/arm64/boot/dts/apple/t6040.dtsi | 74 +++++++++++++++++++++++ 2 files changed, 86 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts index ffbbffcd77544..940edd548aef8 100644 --- a/arch/arm64/boot/dts/apple/t6040-j616s.dts +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -23,6 +23,9 @@ keyboard = &keyboard; wifi0 = "/pcie@1cb0000000/pci@0,0/wifi@0,0"; bluetooth0 = "/pcie@1cb0000000/pci@0,0/bluetooth@0,1"; + /* used by the loader to hand over the display */ + dcp = &dcp; + disp0 = &display; }; chosen { @@ -313,3 +316,12 @@ &pmp_mbox { status = "okay"; }; + +&dcp { + panel { + compatible = "apple,panel-j616", "apple,panel-mini-led", "apple,panel"; + width-mm = <345>; + height-mm = <223>; + status = "disabled"; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi index 2a7dbc1e9fa5e..c8193a8ef74d6 100644 --- a/arch/arm64/boot/dts/apple/t6040.dtsi +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -514,6 +514,17 @@ clock-output-names = "clkref"; }; + /* + * Display component master. It has no registers; the boot loader + * enables it with the DCP when it hands the display over. + */ + display: display-subsystem { + compatible = "apple,display-subsystem"; + iommus = <&disp0_dart 0>; + dma-noncoherent; + status = "disabled"; + }; + cpufreq_e: cpufreq@210e20000 { compatible = "apple,t6041-cluster-cpufreq", "apple,t8112-cluster-cpufreq"; reg = <0x2 0x10e20000 0x0 0x1000>; @@ -569,6 +580,59 @@ power-domains = <&ps_avd_sys>; }; + disp0_dart: iommu@402300000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x4 0x02300000 0x0 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + status = "disabled"; + }; + + dcp_dart: iommu@402340000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x4 0x02340000 0x0 0x20000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + status = "disabled"; + }; + + dcp: dcp@402e00000 { + compatible = "apple,t6041-dcp", "apple,dcp"; + reg = <0x4 0x02e00000 0x0 0x4000>, + <0x4 0x00000000 0x0 0x4000000>, + <0x4 0x02240000 0x0 0x10000>, + <0x4 0x023a8000 0x0 0x4000>, + <0x4 0x02800000 0x0 0x800000>; + reg-names = "coproc", "disp-0", "disp-1", "disp-2", "disp-3"; + mboxes = <&dcp_mbox>; + mbox-names = "mbox"; + iommus = <&dcp_dart 23>; + apple,bw-scratch = <&pmgr_dcp 0 4 0x20000>; + apple,iomfb-surfaces = <1 1 0 0>; + /* the boot loader enables it when it hands the display over */ + status = "disabled"; + + disp0_piodma: piodma { + iommus = <&disp0_dart 16>; + }; + }; + + dcp_mbox: mailbox@402e08000 { + compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x4 0x02e08000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + #mbox-cells = <0>; + status = "disabled"; + }; + ans_mbox: mailbox@409608000 { compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; reg = <0x4 0x09608000 0x0 0x4000>; @@ -844,6 +908,16 @@ /* child nodes are added in t6040-pmgr.dtsi */ }; + /* + * The PMGR range the DCP driver hands to its firmware; apple,bw-scratch + * points into it. + */ + pmgr_dcp: power-management@504800000 { + reg = <0x5 0x04800000 0x0 0xbc000>; + reg-names = "dcp-fw-pmgr"; + #apple,bw-scratch-cells = <3>; + }; + /* * The always-on GPIO bank (ADT /arm-io/nub-gpio0, 61 pins). Its power * state is in the always-on PMGR. From 3a31921521ee42d01baa706eb04c4a37c6e0d93d Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:52 -0300 Subject: [PATCH 12/16] arm64: dts: apple: t6040: Add the PMC voters, CLPC and SLC planes Add: - the PMC voter interface (floor words at 0x5_04800000, honoured and rail enable words at 0x5_048aa000), with the CLPC agent (1) and the AP agent (3) as static voters; - the CLPC floor driver on agent 1; - the 16 SLC planes (4 AMCC x 4). The PMP's agent (0) is not a static voter while the PMP does not run under Linux: iBoot leaves its floor word at 0x15 (DCS 5, fabric 1), and enabling the agent would pin the DCS at its top state. GFX (2) is dynamic and not described yet. The SLC waits for the display subsystem, as on T8140: the display takes over the scan-out DMA that iBoot left running. The PMC windows lie inside the display's PMGR window, which the DCP driver only passes to its firmware, so the two do not conflict; the PMC node takes its rails range's unit address. The layout comes from the J616s ADT and the macOS T6041 PMC, CLPC and MCC drivers, and matches T8140's nodes. Binding: apple,t6041-pmc, -clpc and -mcc from #385 ("soc: apple: pmc, clpc, mcc: add T6040 (M4 Pro)"). Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-j616s.dts | 8 ++++ arch/arm64/boot/dts/apple/t6040.dtsi | 56 +++++++++++++++++++++++ 2 files changed, 64 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts index 940edd548aef8..1f0ed2f0b258e 100644 --- a/arch/arm64/boot/dts/apple/t6040-j616s.dts +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -325,3 +325,11 @@ status = "disabled"; }; }; + +&pmc { + status = "okay"; +}; + +&mcc { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi index c8193a8ef74d6..faf90477a5b02 100644 --- a/arch/arm64/boot/dts/apple/t6040.dtsi +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -550,6 +550,34 @@ apple,fast-die-effort = <&pmp_report 2>; }; + /* + * System level cache planes: four AMCCs with four planes each. + * Allocation waits for the display, which takes over the scan-out DMA + * the boot loader left running. + */ + mcc: memory-controller@220000000 { + compatible = "apple,t6041-mcc", "apple,t8140-mcc"; + reg = <0x2 0x20000000 0x0 0x4000>, + <0x2 0x20040000 0x0 0x4000>, + <0x2 0x20080000 0x0 0x4000>, + <0x2 0x200c0000 0x0 0x4000>, + <0x2 0x22000000 0x0 0x4000>, + <0x2 0x22040000 0x0 0x4000>, + <0x2 0x22080000 0x0 0x4000>, + <0x2 0x220c0000 0x0 0x4000>, + <0x2 0x24000000 0x0 0x4000>, + <0x2 0x24040000 0x0 0x4000>, + <0x2 0x24080000 0x0 0x4000>, + <0x2 0x240c0000 0x0 0x4000>, + <0x2 0x26000000 0x0 0x4000>, + <0x2 0x26040000 0x0 0x4000>, + <0x2 0x26080000 0x0 0x4000>, + <0x2 0x260c0000 0x0 0x4000>; + nonposted-mmio; + apple,boot-dma-devices = <&display>; + status = "disabled"; + }; + /* * The decoder firmware programs the T8122/T8132 register family, so * the driver binds through its T8132 entry. The ADT gives the whole @@ -918,6 +946,34 @@ #apple,bw-scratch-cells = <3>; }; + /* + * PMC voter interface: the floor word of agent a at "voters" + + * 0x4000 * a, the floors the PMC honours and the rail enable words + * at "rails". Both lie inside pmgr_dcp's range, which the DCP driver + * only hands to its firmware, so the two do not conflict; "rails" + * comes first so that this node's unit address differs from + * pmgr_dcp's. + * Static voters are CLPC (1) and AP (3). The PMP's agent (0) stays + * off while the PMP does not run: iBoot leaves its floor at the top + * DCS state. + */ + pmc: power-management@5048aa000 { + compatible = "apple,t6041-pmc"; + reg = <0x5 0x048aa000 0x0 0x3000>, + <0x5 0x04800000 0x0 0x10000>; + reg-names = "rails", "voters"; + nonposted-mmio; + #address-cells = <1>; + #size-cells = <0>; + apple,static-voters = <1 3>; + status = "disabled"; + + clpc: performance-controller@1 { + compatible = "apple,t6041-clpc"; + reg = <1>; + }; + }; + /* * The always-on GPIO bank (ADT /arm-io/nub-gpio0, 61 pins). Its power * state is in the always-on PMGR. From 4f7801d308d07ac4234540b36a39e3e3a04bb812 Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:52 -0300 Subject: [PATCH 13/16] arm64: dts: apple: t6040: Add the AOP and its audio DMA Add the AOP (always-on processor), its mailbox and DART, and the two audio ADMACs (admac-leap-ns and admac-base-ns), with the generic compatibles their drivers match. The AOP children are the audio component (the microphones' DMA channel, the speaker stream's and the headphone jack's channels), the ambient light sensor and the lid angle service, as on T6020. The J616s board file names the chassis for the audio component. Each ADMAC is wired to the first of its four interrupt outputs, so the other three entries are empty. Binding: apple,t6041-aop and apple,t6041-aop-audio from the T6041 AOP series, github.com/jgoyvaerts/linux branch m4pro/aop-t6041. Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-j616s.dts | 25 +++++++ arch/arm64/boot/dts/apple/t6040.dtsi | 89 +++++++++++++++++++++++ 2 files changed, 114 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts index 1f0ed2f0b258e..329160a3968f5 100644 --- a/arch/arm64/boot/dts/apple/t6040-j616s.dts +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -333,3 +333,28 @@ &mcc { status = "okay"; }; + +&aop { + status = "okay"; +}; + +&aop_mbox { + status = "okay"; +}; + +&aop_dart { + status = "okay"; +}; + +&admac0 { + status = "okay"; +}; + +&admac1 { + status = "okay"; +}; + +&aop_audio { + apple,chassis-name = "J616"; + apple,machine-kind = "MacBook Pro"; +}; diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi index faf90477a5b02..b31571e71acaf 100644 --- a/arch/arm64/boot/dts/apple/t6040.dtsi +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -1111,6 +1111,95 @@ status = "disabled"; }; + /* + * AOP (always-on processor). The boot loader loads its RTKit firmware + * and leaves it stopped; Linux starts it. + */ + aop: aop@510600000 { + compatible = "apple,t6041-aop"; + reg = <0x5 0x10c10000 0x0 0x2e0000>, + <0x5 0x10600000 0x0 0x88000>, + <0x5 0x10050000 0x0 0x4000>, + <0x5 0x08328000 0x0 0x24>; + reg-names = "firmware", "asc", "asc-aux", "config"; + mboxes = <&aop_mbox>; + mbox-names = "mbox"; + iommus = <&aop_dart 0>; + status = "disabled"; + + /* + * "dma" is the microphones' LEAP ADMAC channel; "spkr" and + * "sense" are the speaker stream's base-ns ADMAC channels 0 and + * 1 (ADT audio-speaker dma-channels), "cout" and "cin" the + * headphone jack's channels 4 and 5 (TX2 and RX2, ADT + * audio-codec-output and audio-codec-input). + */ + aop_audio: audio { + compatible = "apple,t6041-aop-audio", "apple,t6030-aop-audio"; + dmas = <&admac0 1>, <&admac1 0>, <&admac1 1>, <&admac1 4>, + <&admac1 5>; + dma-names = "dma", "spkr", "sense", "cout", "cin"; + #sound-dai-cells = <1>; + }; + + aop_als: als { + compatible = "apple,t6041-aop-als", "apple,aop-als"; + }; + + aop_las: las { + compatible = "apple,t6041-aop-las", "apple,aop-las"; + }; + }; + + /* ADT lists the interrupts as 1, 0, 3, 2 of the block: send-empty is the lowest. */ + aop_mbox: mailbox@510608000 { + compatible = "apple,t6041-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x5 0x10608000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + #mbox-cells = <0>; + status = "disabled"; + }; + + aop_dart: iommu@510f00000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x5 0x10f00000 0x0 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + status = "disabled"; + }; + + /* The audio fabric's ADMACs: admac-leap-ns (DART stream 10) and admac-base-ns (stream 8) */ + admac0: dma-controller@513300000 { + compatible = "apple,t6041-admac", "apple,t8132-admac"; + reg = <0x5 0x13300000 0x0 0x34000>; + #dma-cells = <1>; + dma-channels = <18>; + /* the ADT gives the first of the four outputs */ + interrupts-extended = <&aic AIC_IRQ 757 IRQ_TYPE_LEVEL_HIGH>, + <0>, <0>, <0>; + iommus = <&aop_dart 10>; + status = "disabled"; + }; + + admac1: dma-controller@513800000 { + compatible = "apple,t6041-admac", "apple,t8132-admac"; + reg = <0x5 0x13800000 0x0 0x34000>; + #dma-cells = <1>; + dma-channels = <13>; + /* the ADT gives the first of the four outputs */ + interrupts-extended = <&aic AIC_IRQ 754 IRQ_TYPE_LEVEL_HIGH>, + <0>, <0>, <0>; + iommus = <&aop_dart 8>; + status = "disabled"; + }; + mtp: mtp@514600000 { compatible = "apple,t6041-mtp", "apple,t6041-rtk-helper-asc4", "apple,mtp", "apple,rtk-helper-asc4"; From 3e69625ec916260a450eadbf75a8c7c0d0a9a9df Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:52 -0300 Subject: [PATCH 14/16] arm64: dts: apple: t6040-j616s: Add the speakers The six SN012776 speaker amps, from the J616s ADT: the left amps 0x38, 0x39 and 0x3a on i2c1, the right amps 0x3b, 0x3c and 0x3d on i2c3, the shared interrupt (AP pin 55, level low) and the sense slots from the master node's speaker-config. The shared shutdown line (AP pin 54, low = shutdown) is one fixed regulator, the SDZ supply of all six, rather than per-amp shutdown-gpios: with GPIO_SHARED, six references become a vote, and one amp driving the line low would not shut the other five down. Every amp joins the SDZ fail-closed group, so an over-temperature or over-current fault on any one forces the line low. The sound card is the J616 variant of macaudio with the AOP audio component's speaker back-end (DAI 3); the AOP firmware runs the stream on one MCA serializer for all six amps. The codecs are listed in the ADT provider order, so each amp gets its native playback slot (LW1 0, RW1 1, LW2 2, RW2 3, LT 4, RT 5). The idle masks are the master node's amp-tx-zd-config rows 0 and 1: LW1 drives zeros in the right amps' sense slots, RW1 in the left amps'. Binding: apple,j616-macaudio and the TAS27xx SDZ supply from the J616s speaker series, github.com/jgoyvaerts/linux branch m4pro/speakers-j616s. Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-j616s.dts | 138 ++++++++++++++++++++++ 1 file changed, 138 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts index 329160a3968f5..f0290e25f7f9d 100644 --- a/arch/arm64/boot/dts/apple/t6040-j616s.dts +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -125,6 +125,55 @@ }; }; }; + + /* + * The speaker amps' shared shutdown line (SDZ, AP pin 54, low = + * shutdown). One fixed regulator, the SDZ supply of all six, not + * per-amp shutdown-gpios: with GPIO_SHARED six references become a + * vote, and one amp driving the line low would not shut the other + * five down. + */ + speaker_sdz: regulator-sn012776-sdz { + compatible = "regulator-fixed"; + regulator-name = "sn012776-sdz"; + gpios = <&pinctrl 54 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + /* + * The AOP firmware runs the stream (MCA cluster 0, one serializer for + * all six amps); the J616 variant of macaudio links the AOP audio + * component's speaker back-end (DAI 3) to the amps. The codecs are + * listed in the ADT provider order, so each gets its native playback + * slot (LW1 0, RW1 1, LW2 2, RW2 3, LT 4, RT 5). The idle masks are the + * ADT amp-tx-zd-config rows 0 and 1: LW1 drives zeros in the right + * amps' sense slots, RW1 in the left amps'. + */ + sound: sound { + compatible = "apple,j616-macaudio", "apple,macaudio"; + model = "MacBook Pro J616"; + #address-cells = <1>; + #size-cells = <0>; + + dai-link@0 { + reg = <0>; + link-name = "Speakers"; + dai-tdm-idle-mode-0 = "zero"; + dai-tdm-idle-mode-1 = "zero"; + dai-tdm-slot-tx-idle-mask-0 = <0xf0f0f0>; + dai-tdm-slot-tx-idle-mask-1 = <0x0f0f0f>; + + cpu { + sound-dai = <&aop_audio 3>; + }; + + codec { + sound-dai = <&speaker_left_woof1>, <&speaker_right_woof1>, + <&speaker_left_woof2>, <&speaker_right_woof2>, + <&speaker_left_tweet>, <&speaker_right_tweet>; + }; + }; + }; }; &cpuidle { @@ -358,3 +407,92 @@ apple,chassis-name = "J616"; apple,machine-kind = "MacBook Pro"; }; + +/* + * The six SN012776 speaker amps, held in hardware shutdown until a sound + * card enables them (ADT /arm-io/i2c1/audio-speaker@38): one interrupt line + * on AP pin 55, level low; sense slots from speaker-config (speaker i at RX + * bytes 4i and 4i + 2, order LW1 RW1 LW2 RW2 LT RT). Names as on the J314 + * and J316, which speakersafetyd's profile uses. Every amp joins the SDZ + * fail-closed group: an over-temperature or over-current fault on any one + * forces the shared shutdown line low. + */ +&i2c1 { + status = "okay"; + + speaker_left_woof1: codec@38 { + compatible = "ti,sn012776", "ti,tas2764"; + reg = <0x38>; + SDZ-supply = <&speaker_sdz>; + apple,sdz-group-fail-closed; + #sound-dai-cells = <0>; + sound-name-prefix = "Left Woofer 1"; + interrupts-extended = <&pinctrl 55 IRQ_TYPE_LEVEL_LOW>; + ti,imon-slot-no = <0>; + ti,vmon-slot-no = <2>; + }; + + speaker_left_woof2: codec@39 { + compatible = "ti,sn012776", "ti,tas2764"; + reg = <0x39>; + SDZ-supply = <&speaker_sdz>; + apple,sdz-group-fail-closed; + #sound-dai-cells = <0>; + sound-name-prefix = "Left Woofer 2"; + interrupts-extended = <&pinctrl 55 IRQ_TYPE_LEVEL_LOW>; + ti,imon-slot-no = <8>; + ti,vmon-slot-no = <10>; + }; + + speaker_left_tweet: codec@3a { + compatible = "ti,sn012776", "ti,tas2764"; + reg = <0x3a>; + SDZ-supply = <&speaker_sdz>; + apple,sdz-group-fail-closed; + #sound-dai-cells = <0>; + sound-name-prefix = "Left Tweeter"; + interrupts-extended = <&pinctrl 55 IRQ_TYPE_LEVEL_LOW>; + ti,imon-slot-no = <16>; + ti,vmon-slot-no = <18>; + }; +}; + +&i2c3 { + status = "okay"; + + speaker_right_woof1: codec@3b { + compatible = "ti,sn012776", "ti,tas2764"; + reg = <0x3b>; + SDZ-supply = <&speaker_sdz>; + apple,sdz-group-fail-closed; + #sound-dai-cells = <0>; + sound-name-prefix = "Right Woofer 1"; + interrupts-extended = <&pinctrl 55 IRQ_TYPE_LEVEL_LOW>; + ti,imon-slot-no = <4>; + ti,vmon-slot-no = <6>; + }; + + speaker_right_woof2: codec@3c { + compatible = "ti,sn012776", "ti,tas2764"; + reg = <0x3c>; + SDZ-supply = <&speaker_sdz>; + apple,sdz-group-fail-closed; + #sound-dai-cells = <0>; + sound-name-prefix = "Right Woofer 2"; + interrupts-extended = <&pinctrl 55 IRQ_TYPE_LEVEL_LOW>; + ti,imon-slot-no = <12>; + ti,vmon-slot-no = <14>; + }; + + speaker_right_tweet: codec@3d { + compatible = "ti,sn012776", "ti,tas2764"; + reg = <0x3d>; + SDZ-supply = <&speaker_sdz>; + apple,sdz-group-fail-closed; + #sound-dai-cells = <0>; + sound-name-prefix = "Right Tweeter"; + interrupts-extended = <&pinctrl 55 IRQ_TYPE_LEVEL_LOW>; + ti,imon-slot-no = <20>; + ti,vmon-slot-no = <22>; + }; +}; From 4af72f47c3cd26240b999764bc3a21e11d4d6a54 Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:53 -0300 Subject: [PATCH 15/16] arm64: dts: apple: t6040-j616s: Add the headphone jack The 3.5 mm jack's codec is a CS42L84 at address 0x4b on i2c2 (ADT /arm-io/i2c2/audio-codec-output@4B). Its reset is nub GPIO pin 58, driven high to run the codec as on the J514/J516, and its interrupt is AP pin 106, level low. The AOP firmware runs the jack's stream on MCA cluster 2. The jack gets a sound card of its own, "MacBook Pro J616 Jack", linking the AOP audio component's jack back-end (DAI 4) to the codec, so a codec that does not answer leaves the speakers working. The audio component already has the jack's DMA channels. Binding: apple,j616-macaudio-jack from the J616s jack series, github.com/jgoyvaerts/linux branch m4pro/jack-j616s. Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-j616s.dts | 44 +++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts index f0290e25f7f9d..99a861163a0c1 100644 --- a/arch/arm64/boot/dts/apple/t6040-j616s.dts +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -174,6 +174,31 @@ }; }; }; + + /* + * The headphone jack: the AOP audio component's jack back-end (DAI 4) + * to the CS42L84. A card of its own, so a codec that does not answer + * costs the jack only, never the speakers. + */ + sound_jack: sound-jack { + compatible = "apple,j616-macaudio-jack", "apple,macaudio"; + model = "MacBook Pro J616 Jack"; + #address-cells = <1>; + #size-cells = <0>; + + dai-link@0 { + reg = <0>; + link-name = "Headphone Jack"; + + cpu { + sound-dai = <&aop_audio 4>; + }; + + codec { + sound-dai = <&jack_codec>; + }; + }; + }; }; &cpuidle { @@ -496,3 +521,22 @@ ti,vmon-slot-no = <22>; }; }; + +/* + * The CS42L84 headphone codec (ADT /arm-io/i2c2/audio-codec-output@4B). Its + * reset line is nub GPIO pin 58, driven high to run the codec (the driver's + * "reset" is an enable, as on the J514/J516); its interrupt is AP pin 106, + * level low. The AOP firmware runs the jack's stream on MCA cluster 2. + */ +&i2c2 { + status = "okay"; + + jack_codec: codec@4b { + compatible = "cirrus,cs42l84"; + reg = <0x4b>; + reset-gpios = <&pinctrl_nub 58 GPIO_ACTIVE_HIGH>; + #sound-dai-cells = <0>; + interrupts-extended = <&pinctrl 106 IRQ_TYPE_LEVEL_LOW>; + sound-name-prefix = "Jack"; + }; +}; From d0535dd4b360ef1bae3b5ee042c4c90321f8c9c3 Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Fri, 23 Oct 2026 01:29:53 -0300 Subject: [PATCH 16/16] arm64: dts: apple: t6040: Add the ISP and the J616s camera From the J616s ADT (isp0, dart-isp0 and the PMGR device table): the coprocessor and its mailbox windows, the first of its four interrupts, three DART instances on one interrupt with streams 1, 6, 7, 10 and 11 aliased to stream 0, and the ISP's power states. isp_cpu and isp_fe are at PMGR +0x4000; the ADT lists isp_secure, isp_be and isp_clr without an address, so the slots follow T8140's order (CPU, FE, DPRX, SECURE, BE, CLR) without the blocks T6040 lacks. With only CPU and FE on, the firmware takes an SError while it loads its tunables. isp_sys hangs off the always-on afi and fab6_soc fabric states. The J616s front camera is an IMX958. iBoot loads the ISP firmware below the kernel's memory; its text and data segments are reserved where the firmware runs them, with the firmware's 32 MiB main memory as the heap window. Two presets of firmware configuration 5 (1920x1080, 1280x720). Binding: apple,t6041-isp from #384 ("media: apple: isp: add T6040 (M4 Pro) camera support"). Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-j616s.dts | 67 +++++++++++++++ arch/arm64/boot/dts/apple/t6040-pmgr.dtsi | 100 ++++++++++++++++++++++ arch/arm64/boot/dts/apple/t6040.dtsi | 70 +++++++++++++++ 3 files changed, 237 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-j616s.dts b/arch/arm64/boot/dts/apple/t6040-j616s.dts index 99a861163a0c1..ee36e3e012cf9 100644 --- a/arch/arm64/boot/dts/apple/t6040-j616s.dts +++ b/arch/arm64/boot/dts/apple/t6040-j616s.dts @@ -46,6 +46,31 @@ #size-cells = <2>; ranges; /* The loader adds its own reservations */ + + /* + * iBoot loads the ISP firmware below the kernel's memory. Its + * segments are the ADT's isp0 segment-ranges (macOS 26.6.2, + * iBoot mBoot-18000.161.10), mapped where the firmware runs them: + * 0x100_0000_0000 onwards, its 32 MiB main memory. The driver + * checks that the coprocessor's reset vector is this text before + * it starts the firmware. + */ + isp_fw_text: isp-firmware-text@10000c44000 { + reg = <0x100 0x00c44000 0x0 0xca8000>; + iommu-addresses = <&isp 0x100 0x0 0x0 0xca8000>; + no-map; + }; + + isp_fw_data: isp-firmware-data@10001e7c000 { + reg = <0x100 0x01e7c000 0x0 0x1344000>; + iommu-addresses = <&isp 0x100 0xca8000 0x0 0x1344000>; + no-map; + }; + + /* the firmware's main memory, the driver allocates above it */ + isp_heap: isp-heap { + iommu-addresses = <&isp 0x100 0x0 0x0 0x2000000>; + }; }; memory@0 { @@ -540,3 +565,45 @@ sound-name-prefix = "Jack"; }; }; + +&isp { + memory-region = <&isp_fw_text>, <&isp_fw_data>, <&isp_heap>; + memory-region-names = "text", "data", "heap"; + apple,platform-id = <5>; + /* ADT isp0 cam-connections-scheme */ + apple,cam-connections-scheme = <0x10>; + status = "okay"; + + /* + * The front camera, an IMX958: firmware configuration 5 as the + * firmware reports it. + */ + sensor-presets { + /* 1920x1080 */ + preset0 { + apple,config-index = <5>; + apple,input-size = <1920 2160>; + apple,output-size = <1920 1080>; + apple,crop = <0 0 1920 1080>; + }; + /* 1280x720 */ + preset1 { + apple,config-index = <5>; + apple,input-size = <1920 2160>; + apple,output-size = <1280 720>; + apple,crop = <0 0 1280 720>; + }; + }; +}; + +&isp_dart0 { + status = "okay"; +}; + +&isp_dart1 { + status = "okay"; +}; + +&isp_dart2 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi b/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi index a3c55e8b125ac..fc0228c236be6 100644 --- a/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi +++ b/arch/arm64/boot/dts/apple/t6040-pmgr.dtsi @@ -8,6 +8,14 @@ */ &pmgr { + ps_ispsens0: power-controller@0 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ispsens0"; + }; + ps_apcie_st0: power-controller@108 { compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; reg = <0x108 4>; @@ -119,6 +127,15 @@ apple,always-on; }; + ps_isp_sys: power-controller@378 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x378 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_sys"; + power-domains = <&ps_fab6_soc>; + }; + ps_apcie_sys_st0: power-controller@380 { compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; reg = <0x380 4>; @@ -140,6 +157,69 @@ }; }; +/* + * The ISP's own power states at PMGR +0x4000 (ADT isp0 reg[1]). The ADT + * gives addresses only for ISP_CPU and ISP_FE; the other slots follow + * T8140's order (CPU, FE, DPRX, SECURE, BE, CLR) without the blocks T6040 + * lacks. With only CPU and FE on, the firmware takes an SError while it + * loads its tunables. + */ +&pmgr_isp { + ps_isp_cpu: power-controller@0 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_cpu"; + power-domains = <&ps_isp_sys>; + }; + + ps_isp_fe: power-controller@8 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_fe"; + power-domains = <&ps_isp_sys>; + }; + + ps_isp_dprx: power-controller@10 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x10 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_dprx"; + power-domains = <&ps_isp_fe>; + }; + + ps_isp_secure: power-controller@18 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x18 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_secure"; + power-domains = <&ps_isp_fe>; + }; + + ps_isp_be: power-controller@20 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x20 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_be"; + power-domains = <&ps_isp_fe>; + }; + + ps_isp_clr: power-controller@28 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x28 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_clr"; + power-domains = <&ps_isp_be>; + }; +}; + &pmgr_aux { ps_pms: power-controller@100 { compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; @@ -150,6 +230,16 @@ apple,always-on; }; + /* fabric parent of isp_sys, on from boot */ + ps_afi: power-controller@110 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x110 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "afi"; + apple,always-on; + }; + ps_avd_sys: power-controller@170 { compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; reg = <0x170 4>; @@ -184,6 +274,16 @@ label = "pms_sram"; apple,always-on; }; + + ps_fab6_soc: power-controller@480 { + compatible = "apple,t6041-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg = <0x480 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "fab6_soc"; + power-domains = <&ps_afi>; + apple,always-on; + }; }; &pmgr_mini { diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi index b31571e71acaf..1046aec7d6208 100644 --- a/arch/arm64/boot/dts/apple/t6040.dtsi +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -919,6 +919,14 @@ /* child nodes are added in t6040-pmgr.dtsi */ }; + pmgr_isp: power-management@502284000 { + compatible = "apple,t6041-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x5 0x02284000 0x0 0x4000>; + /* child nodes are added in t6040-pmgr.dtsi */ + }; + aic: interrupt-controller@502400000 { compatible = "apple,t6041-aic3", "apple,t8122-aic3"; #interrupt-cells = <3>; @@ -1321,6 +1329,68 @@ ; }; }; + + /* + * ISP (ADT isp0, firmware loaded by iBoot). "coproc" is the + * coprocessor up to its control block; "mbox", "gpio" and "mbox2" are + * the interrupt words, the firmware handshake words and the doorbell + * of its mailbox at +0x2924000. The first of the ADT's four + * interrupts carries the mailbox. + */ + isp: isp@580000000 { + compatible = "apple,t6041-isp", "apple,isp"; + reg = <0x5 0x80000000 0x0 0x1604000>, + <0x5 0x82924000 0x0 0x40>, + <0x5 0x829241d0 0x0 0x20>, + <0x5 0x82924464 0x0 0x10>; + reg-names = "coproc", "mbox", "gpio", "mbox2"; + interrupt-parent = <&aic>; + interrupts = ; + iommus = <&isp_dart0 0>, <&isp_dart1 0>, <&isp_dart2 0>; + power-domains = <&ps_isp_sys>, <&ps_isp_cpu>, <&ps_isp_fe>, + <&ps_isp_dprx>, <&ps_isp_secure>, <&ps_isp_be>, + <&ps_isp_clr>, <&ps_ispsens0>; + /* the shared memory window above the firmware's 32 MiB */ + apple,dart-vm-size = /bits/ 64 <0xde600000>; + status = "disabled"; + }; + + /* + * ADT dart-isp0: three instances on one interrupt; ADT "remap": streams + * 1, 6, 7, 10 and 11 are stream 0. + */ + isp_dart0: iommu@5828c0000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x5 0x828c0000 0x0 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_isp_sys>; + apple,remap-streams = <1 0>, <6 0>, <7 0>, <10 0>, <11 0>; + status = "disabled"; + }; + + isp_dart1: iommu@5828e0000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x5 0x828e0000 0x0 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_isp_sys>; + apple,remap-streams = <1 0>, <6 0>, <7 0>, <10 0>, <11 0>; + status = "disabled"; + }; + + isp_dart2: iommu@582900000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x5 0x82900000 0x0 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_isp_sys>; + apple,remap-streams = <1 0>, <6 0>, <7 0>, <10 0>, <11 0>; + status = "disabled"; + }; }; #include "t6040-pmgr.dtsi"