I'm a recent UC Berkeley EECS grad (May 2026) building software at the intersection of machine learning and systems.
- Currently looking for SWE and AI/ML roles, with hardware (ASIC/automotive) as a secondary interest
- Background spans RTL design (RV32I CPU in Verilog, synthesized/placed-and-routed via Sky130 PDK) to ML/software projects (RAG pipelines, multi-LLM evaluation)
- Languages: Python, C/C++, Verilog, Swift, Java
- Tools: PyTorch, TensorFlow, LlamaIndex, Cadence Genus/Innovus/Virtuoso
- Fun fact about me: I'm big into JDM car culture, I sim race and shoot car photography in my free time
- Reach me: LinkedIn • Resume • jansenmok@gmail.com
Open to chatting about RTL design, car culture, or anything in between :)