Device path: per-trial mirrors, the accept pass and unused plasma buffers #103

Found by reading native/src/general.cpp. The effect has not been measured on a GPU.

• device_trapezoid_plasma writes plasma_exposure_ and never reads it, and a trapezoid device run allocates the band column's guard and weight rows. Drop the write and keep plasma_exposure_'s allocation, since device statistics use the buffer.
• accept_update is an update pass and three reductions on devices, against one NormSums pass on the host.
• collect_trial (the Runge-Kutta and batch path), weighted_error and low_storage_step take a fresh host mirror per trial, where the Adams trial now reads pinned memory.

Allocate the band buffers only for band plasma, use NormSums on devices, and keep persistent pinned mirrors as adams_norms_ does, each listed in memory_ledger(), minding that a pinned copy is asynchronous. Measure on an NVIDIA or AMD data-centre GPU; the device rows in benchmarks/history/ are the baseline. The roadmap's general entry gives the wider picture.

Done when

Each change's python -m benchmarks ab --device ratios on a data-centre GPU are in its pull request and show no loss, or it is dropped, and pytest -m gpu passes on a CUDA and a HIP build, which CI does not build.

Checked against commit 9d5d92f; the code links are pinned to it.

Also

Two more device costs, from reading and unmeasured, so both are suspicions:

• Reduction occupancy on short grids. reduction_slots gives a one-column problem at most n / 1024 teams. At 2^14 samples that is 16 teams of 1024 bins, at the default reduction block of 512 threads about 2 bins per thread, which suggests low GPU occupancy. benchmarks.md lists other block sizes as measured and not adopted, but says nothing of reduction_min_bins. Vary it against the block size at 2^12 to 2^16 samples on a data-centre GPU.
• Default tiles. Range2 keeps Kokkos's default tiles on CUDA and HIP, where the host's tiling gave Exponential Adams performance: host Range2 tiling, host cost, fused trial #55 21 % on an AMD EPYC 7763 and 16 to 18 % on an Apple M5 Max (rdw, 16 threads). SEP 28 left device tile sizes as a separate item. The only device record found is the band column's tiled kernels on an NVIDIA A40, where 512-sample tiles gave 1.010 and 1.019; whether those are Range2 kernels was not traced. Try other Range2 tiles on CUDA and HIP, or record that the default stands.

Added on 2026-11-01, checked against commit 8a9f764.