[MasterLaplace]

What

An I/O APIC's version register declares up to 256 inputs, but its 8-bit register index reaches entry 0x77 at most (82093AA datasheet, §3.1.1 and §3.2.4). Since #799 an entry past 0x77 gets no register. The routing scaffold now also keeps only the first 120 inputs of each unit, so a Global System Interrupt past them belongs to no unit and no route reaches it.

The inputs left out are counted once, when the scaffold runs, rather than per route asked: ioapic_inputs_unreachable in the [LPLTLM] machine record.

Verify

• an_io_apic_keeps_the_inputs_its_index_reaches was red on a stub that kept every declared input: 121 and 256 stayed whole.
• Server: q35 861/0, -cpu max 863/0, pc 855/0. Satellite: q35 711/0. Each record says ioapic_inputs_unreachable=0.
• Two of three mutants fail the test: the limit one entry further, and counting every declared input. Keeping every declared input in the unit survives, since QEMU's I/O APIC declares 24.
• No budget's window holds the scaffold.

Not in it

• A run with more than 120 declared inputs: QEMU has none, so the ID register keeping its value is read in the code, not seen.

Closes #572