fix(mir-lower): support recursive packed AS3 carrier local projections

[uurl]

Fixes #1094

Summary

Extend the packed-AS3 carrier-local contract introduced by #1327 to support:

• multiple direct AS3 pointer leaves;
• AS3 leaves nested inside structs and tuples;
• bounded fixed arrays containing AS3 leaves;
• recursive field projections;
• array-element projections.

The implementation preserves #1327's closed-world model: the complete MIR address-use graph is validated before dialect conversion, and lowering-private physical type facts are attached only after the whole graph succeeds.

Carrier identity is never reconstructed from LLVM defining operations, OperandsInfo, or converted GEP history.

Representation and projection contract

Semantic values retain AS3 pointers while compiler-owned local storage uses the target-stable generic-pointer carrier:

semantic: <{ ..., p3, nested { p3 }, [p3; N], ... }>
storage:  <{ ..., p0, nested { p0 }, [p0; N], ... }>

Conversions remain explicit at load/store boundaries.

The verified address graph now admits:

carrier alloca
    |
    +-- field_addr
    |      +-- field_addr -> ...
    |      `-- array_element_addr -> ...
    |
    +-- load
    `-- store

Each projection derives its physical pointee from the already-proven parent carrier type.

mir.field_addr supports recursive struct/tuple projections, and mir.array_element_addr uses the verified physical carrier element type. Ordinary non-carrier addressing is unchanged.

Bounds and fail-closed behavior

The existing 16-leaf array rewrite budget is reused. Local-storage shape admission remains independently classified, so future internal-ABI shape widening cannot implicitly widen carrier-local support.

Carrier addresses still fail closed across:

• calls;
• casts;
• block arguments;
• returns;
• arbitrary pointer offsets;
• unknown or unmodelled uses.

AS3 pointer vectors and arbitrary packed-AS3 memory remain unsupported.

Tests

Added focused coverage for:

• recursive/multi-leaf admission;
• bounded arrays, including exact-bound acceptance and above-bound rejection;
• vector rejection;
• nested struct and tuple projections;
• array-element projections;
• recursive zero-sized projections;
• exact physical carrier child types;
• existing call/cast/block-argument rejection.

packed_aggregate_abi now exercises multiple direct leaves, nested structs, nested tuples, and bounded AS3 pointer arrays through carrier-local projections.

Validation

cargo fmt --all
cargo fmt --all -- --check
git diff --check

cargo test -p mir-lower packed_shared_local_storage -- --nocapture
cargo test -p mir-lower packed_shared_internal_abi -- --nocapture
cargo test -p mir-lower --all-targets
cargo clippy -p mir-lower --all-targets -- -D warnings

cargo oxide build packed_aggregate_abi
cargo oxide run packed_aggregate_abi
CUDA_OXIDE_NO_OPT=1 cargo oxide run packed_aggregate_abi
cargo oxide run addressof_sharedarray

Results:

packed-AS3 carrier-local tests: 12 passed
packed-AS3 internal ABI tests:  9 passed
mir-lower unit tests:           308 passed
lowering tests:                 147 passed
clippy -D warnings:             pass

Both optimized and CUDA_OXIDE_NO_OPT=1 packed_aggregate_abi executions pass. addressof_sharedarray also continues to pass.

Out of scope

This PR does not add carrier-address transport through calls, block arguments, casts, returns, or arbitrary pointer arithmetic, nor support for AS3 pointer vectors, arbitrary/device-global/kernel-entry packed-AS3 carrier storage, or AS3-containing enum locals.

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[nihalpasham]

The nested and array cases this adds read and write with the wrong alignment, and the kernel faults:

• A pointer slot nested inside a struct, tuple or array in the packed local is loaded and stored with align 8, but it sits at byte offset 1 or 9 of an align 1 local. The depth-1 case from fix(mir-lower): support packed AS3 carrier local projections #1327 gets align 1 and is fine.

%v22 = load ptr, ptr %v21, align 8    ; %v21 is byte offset 1 of an align-1 alloca

• On an RTX 5090 this faults with misaligned address: a runtime-indexed [[p3; 2]; 2] at -O2 and under libNVVM, a nested read split from its store by a branch under CUDA_OXIDE_NO_OPT=1, and packed_aggregate_abi itself under CUDA_OXIDE_DEBUG=full.
• The CUDA_OXIDE_NO_OPT=1 run in the description does not catch it: llc forwards the stores to the loads, so no local load executes. No test asserts an alignment.
• The admission classifier and the array alignment helpers are copies of code in func_abi.rs and addressing.rs; the bug came along with the copy.

To land this: stamp every carrier projection with the alignment it really has (gcd of the root alignment and the byte offset, 8-byte carrier stride for array elements); unit tests asserting align 1 on nested and array-element loads and stores; kernels in packed_aggregate_abi that keep the slot alive (runtime index, branch between store and read) passing at -O2, NO_OPT, DEBUG=full and --emit-nvvm-ir under memcheck; share the classifier and helpers instead of copying them; merge main in before I vet CI.

[nihalpasham]

Reviewed 818c88dc: changes requested. The landing list is in #1330 (comment).

[uurl]

Addressed the requested changes in 3ea241f after merging main.

• Propagated proven alignment through recursive carrier field and array projections.
• Added LLVM load/store alignment assertions and runtime-indexed regression coverage.
• Consolidated the shared shape classifier and alignment helpers.
• Validated 309 unit tests, 147 integration tests, and Clippy with -D warnings.
• Compute Sanitizer reports 0 errors on RTX 5090 (sm_120a) across optimized PTX, CUDA_OXIDE_NO_OPT=1,
  CUDA_OXIDE_DEBUG=full, and NVVM IR.

The branch is ready for CI vetting and re-review.