[brkosebay]

Part 16 of 23 of the iPad 5 (J71t) series in this repository; merge after #121.

Problem

S8000/S8003 left the SoC and memory performance state at the boot default, which bounds GPU throughput by memory bandwidth.

Change

Describe the SoC performance state in the binding and DT, run the SoC and memory at the high state while active, and restore the low state for sleep.

Testing

• Hardware: iPad 5 Wi-Fi (J71t). Hands-on testing on 2026-11-11 with an integrated build of this series, made before the final failure-path fixes, covered GPU benchmarks with the high state selected.
• 2026-11-12: no further hardware test of this change beyond the above. The top of this series applies to the same kernel tree as the release build tested on J71t that day (20+ warm restarts without a freeze).
• Host: the Linux test suite passes at this branch's head, and the kernel and m1n1 patch series apply on apple-16k and apple-4k. At the top of the series the applied kernel tree is identical to the one in the built release image.
• Other boards that share these drivers or compatibles have not been tested.

Dependencies

Depends on #121.

This branch is stacked on the PRs it depends on and carries their commits; the change of this PR is its last commit, "soc: apple: pmgr-misc: Run the S8000 SoC and memory states high".

🤖 Generated with Claude Code

[henrikklee]

Landing this as your commit. The binding and device tree node are unchanged; the driver patch is reworked so the A9 and the A10 share one description (same register, states and pending bit) with iOS's 8 ms wait, instead of a second variant. The branch now holds only this topic on top of main; your previous head is kept as tag contrib/brkosebay-j71t-soc-perf. Please check the memory bandwidth / glmark2 gain is still there on the next nightly.