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[ROCDL] Gate the TDM tile_dim0 span check on padding - #1302

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coderfeli merged 2 commits into
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tdm-relax-inner-span
Oct 18, 2026
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coderfeli merged 2 commits into
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tdm-relax-inner-span

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deriveTdmAtom refused any tiled atom whose innermost per-issue span was under 16 bytes. The ISA puts no such floor on tile_dim0. Its inner loop advances by data_size, which is 1, 2, 4 or 8 bytes, and the only rule it states for tile_dim0 is that its span be a whole multiple of 4 bytes -- and only when pad_enable is set, because pad_amount and pad_interval step the LDS pointer in whole DWORDs while bytesStored accumulates across rows, so a row whose span is not a multiple of 4 lands the pad inside the next row. A wider span coalesces better, but the hardware does not require one.

The floor blocked layouts the older make_tdm_atom has always emitted. In aiter, mxfp8's non-preshuffled A-scale tile is (tile_m, tile_k / 32): one e8m0 byte per 32 elements, so 8 bytes at tile_k = 256. That transfer runs correctly through make_tdm_atom today, but make_tiled_tdm_atom could not even construct the op for it.

Checking the 4-byte rule only when geometry.padAmount is set lets that site migrate. Verified with the TDM FileCheck tests (including both negative ones), tests/unit -k "tdm or copy or layout" (86 passed, 1 skipped), and aiter's op_tests/test_gemm_a8w8_mxfp8_bpreshuffle.py with the site switched to the tiled atom: 36 shapes, err 0, over three runs.

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xudoyuan and others added 2 commits October 16, 2026 16:28
deriveTdmAtom refused any tiled atom whose innermost per-issue span was
under 16 bytes. The ISA puts no such floor on tile_dim0. Its inner loop
advances by data_size, which is 1, 2, 4 or 8 bytes, and the only rule it
states for tile_dim0 is that its span be a whole multiple of 4 bytes -- and
only when pad_enable is set, because pad_amount and pad_interval step the
LDS pointer in whole DWORDs while bytesStored accumulates across rows, so a
row whose span is not a multiple of 4 lands the pad inside the next row.
A wider span coalesces better, but the hardware does not require one.

The floor blocked layouts the older make_tdm_atom has always emitted. In
aiter, mxfp8's non-preshuffled A-scale tile is (tile_m, tile_k / 32): one
e8m0 byte per 32 elements, so 8 bytes at tile_k = 256. That transfer runs
correctly through make_tdm_atom today, but make_tiled_tdm_atom could not
even construct the op for it.

Checking the 4-byte rule only when geometry.padAmount is set lets that site
migrate. Verified with the TDM FileCheck tests (including both negative
ones), tests/unit -k "tdm or copy or layout" (86 passed, 1 skipped), and
aiter's op_tests/test_gemm_a8w8_mxfp8_bpreshuffle.py with the site switched
to the tiled atom: 36 shapes, err 0, over three runs.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
Remove the `innerBits` restriction for `make_tiled_tdm_atom`.
@xudoyuan
xudoyuan requested a review from sjfeng1999 October 16, 2026 08:34
@coderfeli
coderfeli merged commit d00dd71 into main Oct 18, 2026
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@coderfeli
coderfeli deleted the tdm-relax-inner-span branch October 18, 2026 10:37
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3 participants