A 4-bit adder and a 4-bit two's-complement subtractor, each designed and simulated in NI Multisim and then built and tested on a breadboard with TTL logic chips. Lab 2 of ECE 2705 (Digital Design I Lab) at Utah Valley University, Fall 2026.
- Inputs: an 8-position DIP switch sets two 4-bit numbers, A3–A0 and B3–B0. Each switch line has a 1 kΩ pull-down resistor, so an open switch reads as a clean 0.
- Math: a 74LS83 4-bit full-adder chip adds A + B + carry-in and outputs a 4-bit sum (S3–S0) and a carry-out (Cout).
- Outputs: five LEDs (Cout, S3–S0) show the result in binary. Each LED is driven by a 74LS04 inverter through a 330 Ω current-limiting resistor.
- Power: +5 V DC bench supply.
Adding: the carry-in is tied to 0, so the chip computes A + B. Example: 1100 + 0011 = 0 1111.
Subtracting (two's complement): to compute A − B, the circuit adds A to the two's complement of B:
- Invert every bit of B with 74LS04 inverters.
- Set the carry-in to 1, which adds the extra +1.
- Ignore the carry-out.
Example: 1001 − 0111 → 1001 + 1000 + 1 = 1 0010 → the answer is 0010 (9 − 7 = 2).
| 4-bit adder | 4-bit subtractor |
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Each circuit was simulated with several different switch settings:
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| Subtractor tests | ||
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More test photos and close-ups
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| Part | Job |
|---|---|
| 74LS83 | 4-bit binary full adder |
| 74LS04 | Hex inverter: inverts B for subtraction and drives the LEDs |
| 8-position DIP switch | Sets the A and B inputs |
| 1 kΩ resistors | Pull-downs on the switch inputs |
| 330 Ω resistors + 5 LEDs | Show Cout and S3–S0 |
| Breadboard, +5 V supply, multimeter | Build and test |
The lab handout for ECE 2705 at UVU gave the adder's reference schematic and the two's-complement method. I built both circuits in Multisim, designed the subtractor's changes to the adder, and wired and tested both on the breadboard.
By Timothy Hadfield, Electrical Engineering @ UVU