Skip to content

Pull requests: amd/IRON

Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Reviews
Assignee
Filter by who’s assigned
Assigned to nobody Loading
Sort

Pull requests list

Update MLIR-AIE to pick up ObjectFIFO fix and re-enable MHA
#133 opened Jul 9, 2026 by andrej Collaborator Loading…
gemv: coalesce batched DMA into a single iterated BD per column
#127 opened Jun 26, 2026 by atassis Contributor Loading…
1 of 3 tasks
Add stream-dse fused SwiGLU-prefill operator
#122 opened Jun 18, 2026 by asyms Loading…
3 tasks
Switch to native 512b vectors to improve performance
#110 opened Apr 26, 2026 by AngryLoki Loading…
1 of 3 tasks
Add tile_m/tile_k/tile_n overrides to SwiGLUPrefill
#106 opened Apr 14, 2026 by albiol2004 Contributor Loading…
3 tasks
Add GEMV INT 4
#101 opened Apr 9, 2026 by albiol2004 Contributor Loading…
4 tasks done
Add INT8 GEMM support to the GEMM operator
#94 opened Apr 9, 2026 by albiol2004 Contributor Loading…
Integrate fused SwiGLU decode into Llama 3.2 1B
#80 opened Mar 7, 2026 by jgmelber Collaborator Draft
1 of 4 tasks
Add decode dataflow fusion operators
#79 opened Mar 7, 2026 by jgmelber Collaborator Loading…
6 of 7 tasks
Swiglu fusion designs
#78 opened Mar 7, 2026 by jgmelber Collaborator Loading…
1 of 3 tasks
ProTip! Type g i on any issue or pull request to go back to the issue listing page.