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arm64: dts: apple: describe disabled M4 Max scalers - #1132
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Add J614c, J575c and J773s board descriptions with disabled headphone codecs and amplifiers. Resolve their board GPIO references against the integration pin controller label. Shared T604x resources remain owned by the J616s series. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Consume the merged J616s resource foundation without changing its SoC or board files. The Mac mini live description also has the shared BTM endpoint, so retain it rather than deleting it based on chassis type. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Keep the initial board descriptions free of enablement changes as required by DT2 ADDENDUM 3. Preserve their console aliases and register descriptions for a separate qualified enablement change. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Add both Max scaler apertures, IRQ pairs, DART streams and clock selectors on J614c, J616c and J575c from the preferred live J616c description, cross-checked against the sibling templates. Restore only their disabled physical power providers. Give the DART requests their MSRn-DART labels, preserving the verified PMGR alias to the physical MSRn domain instead of inventing duplicate MMIO providers. Use only MSRn-V and ASE_CORE for engine domains; keep scaler1 absent from live-pruned T6040 descriptions. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Drop the superseded board scaffolding and codec includes now provided by the merged board descriptions. Retain the disabled Max scaler extension, with no scaler1 added to T6040 boards and no hardware enablement. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
RyanTheTide
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Use the ps-groups mapping, rather than treating the group number as a reg index. Group 1 maps the MSR1 and ASE_CORE offsets to the main PMGR bank at 0x502280000. All added providers remain disabled. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
RyanTheTide
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November 7, 2026 16:56
RyanTheTide
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November 7, 2026 16:59
Preserve the merged M3 contracts and retain only the verified Max scaler resource additions and logical DART gate labels. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
RyanTheTide
marked this pull request as ready for review
November 7, 2026 17:06
This was referenced Nov 7, 2026
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Take #1132 (disabled M4 Max scalers), #1148 and #1105 (panel gamut from the ADT), and carry their M4 changes into the new layout: - ps_msr0's ps_msr0_dart label and comment, and scaler0_dart's power-domains = <&ps_msr0_dart>, go to t6040-pmgr.dtsi and t6040.dtsi, where those T6040-only nodes now live; - t6041-j614-j616-j575-scaler.dtsi is included by the J614c and J616c board files, after t6041.dtsi as before; - apple,color-gamut goes from the shared J614c/J616c panel. Each M4 dtb differs from the integration/aurora tip exactly as it differed from this branch's previous base. Signed-off-by: Diljit Singh <hey@djdev.me>
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Brings aurora-wip up to the 11-08 morning integration tip: DT descriptions for every Mac family (#1094, #1097, #1111, #1131, #1132, #1148, #1149, #1155, #1156, #1157, #1172), the J616s scaler (#1168), the panel primaries from boot data (#1105), AVD macOS command parity (#1116), AVD dma-coherent (#1169), the M2 PMU RTC alarm (#1151), G17 admission without spinning (#1146) and the AOP map wait (#1147). Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
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Describe both disabled M4 Max scalers on J614c, J616c and J575c using the preferred live J616c resource windows, IRQs, DART streams and clock selectors, cross-checked against sibling templates. Restore their disabled physical power providers and use only MSRn-V plus ASE_CORE for the engines. The live T6040 J773s description has only scaler0; no scaler1 is added to Pro boards.
The supplied PMGR descriptors and virtual-gate handling give MSR0-DART 425 and MSR1-DART 457 no independent power-state register. Named DART domain labels retain their physical MSR0/MSR1 sharing instead of duplicating MMIO providers. The ps-groups map resolves MSR1/ASE_CORE to the main PMGR bank at 0x502280000, offsets 0x3b0/0x3b8. All new resources remain disabled.
Includes integration 95e30d5 through a merge commit and reuses the merged complete sibling board files. Candidate e30a947 merges without conflicts; actual validation merge 6012eb0 has the identical source tree. No UART or peripheral enables, docs or other task branches are added.
Required unmodified apple-dt-check.sh as a MERGE into 95e30d5 passed in controller buildbox h-50446, rc=0, W=1, at most eight jobs: base/head 122/122 DTBs, make rc=0/0, 620/620 warning lines, new warnings: 0, removed: 0. No binding files are changed. DT2 independently confirmed this source clean on the tip and posted it to MTR-LINUX.
Native focused validation also passes: one disabled live-pruned Pro instance, both disabled Max instances, exact live register/IRQ/selector data, two functional domains, DART stream pairs, reset provider and ps-groups-resolved physical addresses. The earlier bank-mapping mistake is preserved as a negative regression test and corrected in this candidate. Existing baseline validator exceptions are unchanged; no boot qualification or full hardware coverage is claimed.