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arm64: dts: apple: describe T8142 resources and firmware scalers - #1153

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RyanTheTide merged 24 commits into
integration/aurorafrom
ctl/t-5545-t8142-v3
Nov 7, 2026
Merged

RyanTheTide merged 24 commits into
integration/aurorafrom
ctl/t-5545-t8142-v3

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@RyanTheTide RyanTheTide commented Nov 7, 2026 •

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Describe disabled hardware resources for J704/J815 and missing resources on J813, reusing generic bindings and shared SoC includes.

Repeated die resources live in t8142.dtsi / t8142-peripherals.dtsi with canonical block labels. Unexposed chassis instances remain described and disabled. Existing board models, headers and operational properties are preserved, including J873g’s Apple Mac mini (M6). Only added J704/J815/J804/J833ct use board-ID models. New Apple DT files use GPL-2.0+ OR MIT; there are no inventory or scaler-version include splits.

The scaler uses the generic apple,scaler-v23 firmware/descriptor interface, distinct from the existing direct-register interface; its binding file matches that fallback. Resolved MSR/ASE domains, reset and selector 399 use a disabled PMGR clock provider with 54 native windows.

The #1149/#1131/#1155 binding merge retains generation-specific branches, extends explicit native selectors and sorted compatible unions, and preserves exact native clock/EDAC constraints. No new status okay, raw ADT data, tuning/calibration values or kernel-tree gap documents are introduced.

DT3 validated frozen heads 8aff9052 / 664e0cb9 as a combined merge ca199db0 into integration 0fbe09ec: 122→126 DTBs, 443/443 inherited warning lines, 0 new / 0 removed warnings, all 13 touched bindings okay, 0 new status okay. DT3 marked both PRs ready and posted readiness to MTR-LINUX.

Supplemental worker h-50703 on the earlier 634b402 base passed the exact required checker with W=1/-j8 (122→124 DTBs per family, 597/597 inherited warnings, 0 new, 13 bindings plus direct docs okay). All owned changed-file contents are byte-identical on the frozen heads. Native/control audits match 264 records/views; all six schema-selection/generation-preservation audits pass. Full compiled comparisons preserve every existing J813/J873g property/model, permit only four added-board model corrections and exactly 19 additional DISABLED die instances.

Coverage remains partial: existing T6050 PR ownership and remaining provider/IP/APIF/downstream/speaker wiring gaps are recorded in external ledgers. New controllers remain disabled; boot/peripheral/audio qualification and enables are separate work.

Reuse the merged generic hardware contracts. Add the board identities and native error/event register and interrupt counts without changing the established generation-specific cases. These additions describe hardware resources and do not authorize driver takeover.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Describe J704 and J815 identities and CPU/interrupt/serial resources in a common SoC include. Add disabled DART, PIODMA, error-monitoring, telemetry and secure-transport inventories where the complete merged interface is resolved. Preserve the qualified J813 profile and leave ownership, APIF splits and downstream wiring for separate work.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Describe the J813 event status windows without granting ownership of their shared apertures. Keep the common H18 mailbox and native error-window contract extensions identical across the family series.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
@dmitzsaz

dmitzsaz commented Nov 7, 2026

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Note

🤖 Claude Opus 5.5 responding on behalf of @dmitzsaz

Carrying over from #1106 (comment): I have a J704 tree that boots on hardware with cpufreq/PMC, NVMe (#1060), PCIe Wi-Fi/BT/SD (#1124) and the live MTP handoff (#1122, #1123), plus USB4 with #1150. After this is merged, I can send the J704 enables on top of it as a separate PR. Is that okay?

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Add the full disabled T8142 firmware/descriptor scaler resources with both DMA streams and the resolved MSR/ASE/clock/reset controls. Use apple,scaler-v23 so the direct-register driver cannot match the fallback. Dedicated DART gate mappings remain unproven and are not guessed.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
@RyanTheTide RyanTheTide changed the title arm64: dts: apple: describe disabled T8142 board resources arm64: dts: apple: describe T8142 resources and firmware scalers Nov 7, 2026
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM

# Conflicts:
#	Documentation/devicetree/bindings/edac/apple,soc-error-handler.yaml
Preserve merged generation constraints and sorted compatible unions.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Keep board-specific resources in their DTS files and share disabled SoC resources through t8142-peripherals.dtsi. The existing J813 boot profile remains self-contained, so the common include avoids replacing its qualified root and CPU definitions.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Define disabled die resources once in the SoC includes. Board files select only chassis-specific port instances. Keep the standalone J813 boot profile and its qualified providers, with consistent label spelling. Use the established Apple DT SPDX expression and board identifiers for unverified product names.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
@RyanTheTide
RyanTheTide marked this pull request as ready for review November 7, 2026 18:58
@RyanTheTide
RyanTheTide marked this pull request as draft November 7, 2026 18:59
Keep all native SoC resources described even when a chassis does not expose their ports.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Retain merged generation-specific schema branches, extend explicit selectors and sorted compatible unions, and preserve native M5/M6 resource constraints.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
@RyanTheTide
RyanTheTide marked this pull request as ready for review November 7, 2026 19:48
@RyanTheTide

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DT train check (DT3): integration/aurora 0fbe09e, then #1153 (8aff905), then #1154 (664e0cb), merged in that order (merge ca199db, both clean). apple-dt-check.sh: W=1, base 122 / head 126 DTBs (J704, J815, J804, J833ct added), make rc=0/0, 443/443 inherited warning lines, new warnings: 0, removed: 0; 13/13 touched bindings ok; 0 new status = "okay" lines. Review fixes are in: canonical labels, SoC nodes in t8142.dtsi / t8152.dtsi, no /delete-node/ in board files, existing model strings unchanged.

@RyanTheTide
RyanTheTide merged commit 0ed974f into integration/aurora Nov 7, 2026
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RyanTheTide deleted the ctl/t-5545-t8142-v3 branch November 7, 2026 19:51
AxxzyWasTaken pushed a commit to AxxzyWasTaken/aurora-installer that referenced this pull request Nov 9, 2026
…ental

aurora-silicon/linux#1153 and #1154 added device trees for four more
boards: J704 and J815 (T8142) and J804 and J833ct (T8152). The installer
refused all four. Nobody on the team has one, so they come in the way
J813 and J873g did, with a Stage 1 caution the owner acknowledges.

Names are the /product product-name each board's Apple device tree
gives: J804 MacBook Pro (14-inch, M6), J833ct iMac (24-inch, M6),
J704 MacBook Pro (14-inch, M5), J815 MacBook Air (15-inch, M5).

- Inspection policy: J704 and J815 join the universal 26.6.2 (25G83)
  entry next to J813. Apple's published asset sets list both boards for
  25G83. J804 and J833ct shipped with macOS 27.2 on the device-specific
  build 26B7124, the only build Apple lists for them, so they get a
  27.2 entry limited to those two boards. Its recovery minimum follows
  the build number (26.2.7124.0.0,0). Its boot minimum is the T8152
  27.0 image's mBoot-20457.1.29, a lower bound, since these Macs cannot
  run anything older than 27.2.
- supported-models.json, both release templates, the model names and
  the simulated catalog list them. Stage 1 qualification gains 27.2.
- Payload assembly requires a board Stage 2 for each, like every other
  M4 and later Mac. Their DTBs are on integration/aurora.
- Caution: the device trees are new and only describe the hardware,
  most of which stays disabled, and neither aura nor this installer has
  run on these Macs.

The legacy src/main.py tables are left alone, as for J873g.

Assisted-by: LLM
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
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