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J873g: internal SSD, 10GbE, power and audio on aurora-wip - #1197

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Nov 8, 2026
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J873g: internal SSD, 10GbE, power and audio on aurora-wip#1197
Acelogic merged 32 commits into
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@Acelogic Acelogic commented Nov 8, 2026 •
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Ports Thomas Glanzmann's J873g (Mac mini M6, T8152) platform series to aurora-wip: the internal SSD, the on-board 10GbE, power-off/restart/watchdog and audio. USB 2 moves to a follow-up; see below. Each feature is a group of commits, bindings first, then drivers, then device tree. Each adapted commit keeps Thomas's message and sign-off and has a bracketed porter note saying what changed for aurora-wip.

What it adds

  • Internal SSD.
    • The T8152 coastguard SART (sart-version 4).
    • The ANS post-office mailbox, rewritten as a polled, interrupt-free provider.
    • The nvme-apple T8152 entry with the secure register layout. As on T8132, T8140 and T8142, it sets NVME_QUIRK_BROKEN_FUA. The shutdown notification is also sent when the driver is removed.
    • The ANS2 device tree.
  • USB 2 host: moved to a follow-up.
    • Thomas's USB 2 commits for the back-left port (usb-drd1) and the front ports (usb-drd2) stay in the history.
    • The last commit returns the J873g USB description to aurora-wip's shared, disabled state. The generic snps,dwc3 binding allows one iommus entry, but these controllers sit behind two DARTs, so the nodes failed the dt-checks gate.
    • The USB 2 hosts worked on the M6 with that description. They come back in a follow-up PR described with the Apple dwc3 binding.
  • On-board 10GbE on apcie port 2, with the ethernet0 alias.
    • T8152 endpoints keep the reset Max_Read_Request_Size of 512.
    • Port 2 sits on the same host as N1 on port 0. A port 2 setup failure fails the whole host, so aura's j873_pcie_prep() (on main) must run first.
    • The NIC identifies as RTL8125CP (XID 0x708).
  • Power off, restart and watchdog.
    • SPMI uses apple,t8152-spmi with the apple,t8142-spmi fallback.
    • The woodcote PMU NVMEM cells and PMU boot flags are added.
    • macsmc-reboot is registered on T8152, and the watchdog binding is added.
  • Audio.
    • The T8152 AOP ASC wrapper mailbox and dart-sbr with apple,retain-translation.
    • The ADMAC T8152 layout and the PMGR, pwrstate and I2C bindings.
    • The device tree with the CS42L84 jack codec and the SN012776 speaker amp.
    • The speaker stays off: macaudio_j873_cfg.enable_speakers is still false.
  • Fan keys. F0Tg/F0md are described. Fan control stays read-only unless macsmc-hwmon is loaded with the unsafe fan_control parameter.

Not included

  • Thomas's "expose all CPU performance states" device tree. apple-soc-cpufreq refuses T8152 OPPs above P-state 3 without a thermal owner, so it would turn cpufreq off. The two existing states per cluster are unchanged.
  • The DCP display: still in draft J873: port DCP display support and guard AFK handoff #1019.
  • The r8169 changes: in a separate draft PR.

Merged with current aurora-wip

The last commit merges aurora-wip (89a7c98c), which now includes the shared t8152-peripherals.dtsi.

  • The shared file describes four DARTs that this series also added: dart-usb1, dart-usb2, dart-apcie2 and dart-sbr.
  • The merge drops our duplicates and enables the shared nodes by label from the J873g fragments. It also adds the properties the tested description had: one 0xc000 window per DART instance, and apple,retain-translation on dart-sbr.
  • This is done inside the merge so that every commit gives a bootable J873g DTB.
  • Compared with the hardware-tested DTB, the only differences are an explicit status = "okay" on those four DARTs, phandle numbering, and the 39 disabled nodes the shared file adds.

Validation

Builds and static checks:

  • The Image, the J873g DTB and 231 modules build.
  • dt_binding_check is clean.
  • dtbs_check adds no new warnings. Replaying the dt-checks gate against aurora-wip gives 0 new and 8 removed (the T8152 pmgr/pwrstate bindings).
  • checkpatch is clean apart from "does MAINTAINERS need updating" on the new dtsi files.

Hardware, on an M6. These were guarded RAM boots through aura:

  • first through public aura main at 31da403e;
  • then through 5211a863 plus aura's T8152 amp-config fix (separate PR). That boot carried a test-only speaker change that is not in this PR.
  • Then at this PR's merge with current aurora-wip, through public aura main 5211a863 with no changes.
  • The final run was at this PR's head, with USB left out, through the same aura main.

Every boot passed the guarded boot checks. Apart from USB 2, which was tested on the earlier boots only, the results below held on every boot.

  • Boot: the GPU smoke rendered correct pixels with zero taint. Both PCIe ports trained. Linux switched off the unused power domains without errors.
  • USB 2 (earlier boots only, before it moved to the follow-up): both xHCI hosts came up and the on-board hub enumerated at high speed on the front ports. No external device was tested.
  • 10GbE: r8169 binds and the internal PHY attaches. No cable was connected, so traffic is untested.
  • Audio: the card registers and the speaker is disabled as intended. Silent playback and capture on the headphone jack both completed. The headset microphone wasn't tested with a headset.
  • Internal SSD: a read-only probe. The controller came up live with its namespaces, the partition table was read, and direct reads returned without errors. Removing the driver sent the shutdown notification, which the controller acknowledged. Linux made no writes and no mounts on this M6; write testing was done on Thomas's original series.
  • cpufreq: unchanged from aurora-wip, at 1440 and 1728 MHz on the P/M cluster.
  • Restart: reboot -f through the new SMC restart handler (macsmc-reboot, with the SPMI controller and the PMU NVMEM cells loaded) restarted the M6 through iBoot into aura. This passed twice, the second time on the merged kernel. Each following boot's PMU guard read error byte 0xf802 as 0.
    • Before the restart the cells read boot-stage 0x30 (written at probe), and boot-error-count, panic-count and shutdown-flag 0.
  • Not tested here:
    • power off, because the machine would stay off until someone presses the button;
    • the watchdog;
    • 10GbE traffic (no cable).

Attribution

Thomas Glanzmann authored the J873g SSD, USB, PCIe/10GbE, power and audio support and its hardware findings; his provenance statements are kept in the commits. Acelogic ported the series to aurora-wip, rewrote the ANS mailbox as a polled provider (Co-developed-by), applied the review fixes described in each porter note, and ran the M6 validation above.

sithglan and others added 30 commits November 7, 2026 23:30
@sithglan @Acelogic
dt-bindings: iommu: apple,sart: Add T8152 compatible
9b4cf0e 
The T8152 (M6) SART (ADT sart-version 4) keeps the per-entry
configuration, address and size registers in three separate arrays, so
it is not compatible with the earlier SARTs. Add apple,t8152-sart.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
dt-bindings: nvme: apple,nvme-ans: Add T8152 compatible
b16eae5 
T8152 (M6) uses the secure ANS2 register layout and is not compatible
with the earlier controllers. There is no T8152 PMGR provider yet; the
loader leaves ANS powered and the driver treats the reset as optional,
so do not require resets and power domains for apple,t8152-nvme-ans2.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
dt-bindings: mailbox: apple,mailbox: Add T8152 ANS mailbox
359d13a 
The T8152 (M6) ANS co-processor is reached through a 0x80 window in the
post-office mailbox bank. No interrupts are described for it and the host
polls it. Add apple,t8152-ans-mailbox and only require interrupts for
the other mailboxes.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
soc: apple: sart: add the T8152 coastguard SART (sart-version 4)
2c87179 
Config, paddr and size registers at 0x00, 0x60 and 0xc0 per entry, in
4 KiB units, as m1n1 src/sart.c. Needed by ANS2 on the M6 Mac mini.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: Exercised on the ported code by a read-only probe on the M6;
write testing was done on Thomas Glanzmann's original J873 series.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
soc: apple: mailbox: add the J873 ANS post-office mailbox
83e97d0 
Add a polled, interrupt-free provider for the ANS post-office window.
ANS uses mailbox 3 of the non-alias post-office bank (0x316010300), a
0x80-byte window with the same counted-FIFO layout as the T8152 SMC
mailbox. No interrupt is described for it, so the provider claims none:
receive runs on the receive poller of the GFX ASCWrap v8 provider, send
polls the FIFO status, and the receive hold/release hooks do nothing for
it. It binds only on the J873, at exactly that window.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: adapted for aurora-wip, which has no PMP post-office
provider: the original made the PMP provider's J873 window check per
hardware entry and added ANS next to PMP; here the polled mode is added
for the ANS entry alone. Exercised on the ported code by a read-only
probe on the M6; write testing was done on Thomas Glanzmann's original
J873 series.]
Co-developed-by: Acelogic <miguelc4600@gmail.com>
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
nvme: apple: add T8152 (M6) with the secure register layout
81bc2a9 
The M6 ADT marks ANS2 with nvme-secure-reg-layout: as in macOS
AppleANS2NVMeController with its 0x92a flag, AQA/ASQ/ACQ and the I/O
queue registers move up by 0x4000 and LINEAR_SQ_CTRL moves to 0x2813c;
CC/CSTS, doorbells and NVMMU stay. NVMe and NVMMU share one window, and
there is no reset provider yet. Reads and writes verified on J873.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: adapted for aurora-wip: the T8152 entry joins the T8142 and
T6040 ones and sets NVME_QUIRK_BROKEN_FUA like the T8132, T8140 and
T8142 entries, and the moved LINEAR_SQ_CTRL is used inside the existing
lsq_in_nvmmu check. The read and write verification above was on Thomas
Glanzmann's original J873 series; the ported code is exercised by a
read-only probe on the M6.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
nvme: apple: send the shutdown notification on T8152
a400e25 
The post-M4 disable path only clears CC.EN, so the ANS firmware treats
every system shutdown as unclean: on the next boot it logs
"uncleanReboot yes" and abandons its open bands (host SLC, parity, CLOG).
On T8152, send the NVMe shutdown notification (CC.SHN normal, wait for
CSTS.SHST complete) before the CC.EN clear on system shutdown. The RTKit
co-processor is still left running, as before.

Tested on a J873 (Mac mini M6): after a reboot the firmware no longer
reports an unclean reboot (0 instead of 4 "uncleanReboot yes" messages).

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: adapted for aurora-wip, which already sends the notification
at the final system shutdown of every post-M4 controller: T8152 also
sends it when the driver is removed, as the original did, but not for
system sleep. The test above was on Thomas Glanzmann's original J873
series; the ported code is exercised by a read-only probe on the M6.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
arm64: dts: apple: j873: ANS2 NVMe
8eb5187 
Mailbox, SART and NVMe nodes for the internal SSD. The driver wakes
iBoot's running ANS firmware with a fresh RTKit handshake.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: adapted for aurora-wip: the nodes go into
t8152-j873-nvme.dtsi, which t8152-j873g.dts includes, instead of a
separate t8152-j873-nvme.dtb layered on the USB tree. Exercised on the
ported code by a read-only probe on the M6; write testing was done on
Thomas Glanzmann's original J873 series.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
arm64: dts: apple: j873: USB1 (back-left) USB2 host bring-up
9c56293 
Describe usb-drd1 as a plain DWC3 host behind its two T8110-style
DARTs. The loader powers the controller, wakes the port's HPM (SSPS 0)
and initialises the eUSB2 PHY in host mode before Linux starts.
Resources are from the 26A434 ADT. A USB keyboard enumerates.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: adapted for aurora-wip: the nodes go into
t8152-j873-usb.dtsi, which t8152-j873g.dts includes, instead of a
separate t8152-j873-usb.dtb. dtbs_check warns that the snps,dwc3 binding
allows one iommus entry; the controller sits behind two DARTs, as
described here.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
arm64: dts: apple: j873: USB2 host for the front ports (usb-drd2)
7c13f45 
usb-drd2 feeds the on-board VL822 hub (05ac:800f) behind the two front
USB-C ports. Describe it like usb-drd1: plain DWC3 host behind its two
DARTs (0x383020000/0x383040000, IRQ 1750), controller IRQ 1763. The
loader also releases the hub from reset (nub-gpio 39).

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: the nodes go into t8152-j873-usb.dtsi; dtbs_check gives the
same snps,dwc3 iommus warning as for usb-drd1.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
PCI: apple: keep T8152 endpoints at the reset Max_Read_Request_Size
199c58c 
On T8152 (J873) the on-board RTL8127A transmits much slower with large
read requests: r8169 sets MRRS to 4096, which limits 9000-byte frames
to 7.0 Gbit/s (UDP, iperf3 to an ixgbe peer). At 2048 it reaches 7.9,
at 1024, 512 or 256 the full 9.93 Gbit/s; at MTU 1500 TCP Tx goes from
9.1 to 9.4 Gbit/s and UDP Tx from 7.9 to 9.5. Set no_inc_mrrs on the
T8152 host bridge so devices keep the 512-byte reset value and drivers
cannot raise it.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
arm64: dts: apple: j873: apcie port 2 with the on-board 10GbE NIC
1ef5ecd 
Describe apcie port 2 next to port 0 (N1): its DART (dart-apcie2), the
port with PERST# on AP GPIO 5 and its INTx controller and bus range like
the other Apple root ports, and the NIC (MAC address filled in by the
loader). The ADT names an aqc107 there; the device has PCI ID 10ec:8127
and is driven by r8169.

pcie-apple brings the port up with the T602x port layout plus two steps
from macOS: clear PHY_LANE_CFG bit 4 in the refclk handshake
(AppleT8152PCIePort::_initializeRefclkBuffer), and after PERST# wait for
the lane PIPE reset status (port 0xa8) and clear port 0x82c bit 16
(APCIECoreRCGen5Port::enablePortHardware). The loader must first ungate
the AUS5 PHY and write lane-cfg to RC reg 4. Link: Gen3 x1, 10Gbps.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: adapted for aurora-wip, where the T8152 hw entry, both macOS
steps, the AP GPIO controller and port 0 (N1) already exist: only the
device tree part remains, in t8152-j873-ethernet.dtsi, squashed with the
original follow-up that describes the port per the binding, and the
subject changed to match. Port 2 is bus 2 (RID 0x200 to dart-apcie2
stream 1), and the per-port interrupts are listed up to port 2. A port 2
setup failure (lanes stuck in PIPE reset, for example) fails the whole
host, port 0 included, so the aura loader's j873_pcie_prep() (PHY
tunables, AUS5 ungate, lane-cfg, dart-apcie0/2 tunables) must run before
Linux starts. At runtime the NIC identifies as RTL8125CP (XID 0x708).]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
arm64: dts: apple: j873: ethernet0 alias
cef0a05 
Boot loaders (m1n1, aura) fill in the on-board NIC's MAC address through
the ethernet0 alias, as on the other Apple machines.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: adapted for aurora-wip: the alias goes into
t8152-j873-ethernet.dtsi.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
dt-bindings: watchdog: apple,wdt: Add T8152 compatible
4d01529 
The T8152 (M6) watchdog is compatible with the T8103 one.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
dt-bindings: spmi: apple,spmi: Add T8152 compatible
c9eeda6 
The T8152 (M6) SPMI controller is a fourth generation with its FIFO
registers moved to 0x200, so it is not compatible with the T8103 one.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: adapted for aurora-wip, which already describes the gen-4
T8142 controller and drives its layout: T8152 takes an apple,t8142-spmi
fallback instead of a driver match of its own.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
dt-bindings: nvmem: apple,spmi-nvmem: Add woodcote PMIC
8c011c1 
The primary PMU of T8152 (M6) machines is "woodcote" (ADT pmu-main),
with the boot flags in the same scratchpad layout as the other Apple
PMICs.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
mfd: macsmc: register macsmc-reboot on T8152
5ba4dea 
T8152 registers only macsmc-hwmon. The reboot function only writes the
MBSE key, and key writes already work on this SMC. Register
macsmc-reboot as well; notifications, GPIO and the power supply stay
unregistered.

On a J873 (Mac mini M6), reboot then sends MBSE = rest, then phra, and the
machine restarts with the boot chime; poweroff sends offw, then off1, and
it switches off.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: adapted for aurora-wip, whose T8152 hwmon leaves fan control
to the firmware: its fan keys are read-only unless the unsafe
fan_control parameter is set (in the original, macsmc-hwmon drove the
fan through F0md/F0Tg), and the comment says so. The reboot and power
off test above was on Thomas Glanzmann's original J873 series.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
arm64: dts: apple: j873: SMC power off/restart and the watchdog
0c2a84e 
Describe the SMC reboot function (apple,smc-reboot) and the watchdog
(ADT /arm-io/wdt, wdt,t8152, IRQ 447), with a 24 MHz clkref (the ADT
timebase-frequency) as on T8103. The PMU NVMEM boot flags are not
described yet; macsmc-reboot treats them as optional. The watchdog
registers at 24 MHz and provides /dev/watchdog and a restart fallback.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: the nodes use the labels of t8152-j873g.dts.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
arm64: dts: apple: j873: PMU boot flags on SPMI for power off
6061934 
'off1' only keeps the machine off when the PMU shutdown flag is set;
without it the J873 powered back on into m1n1 at once. Describe
nub-spmi0 (gen 4, 0x308714000, 16 KiB) and its primary PMU (pmu-main,
"woodcote", slave 0xe) as an apple,spmi-nvmem with the boot flags in its
legacy scratchpad (ADT info-leg_scrpad = 0xf800, laid out as on T8103 and
T8140): boot_stage 0xf801 (read 0x30, kernel started), boot_error_count
and panic_count 0xf802, shutdown_flag 0xf80f bit 3. Hand them to
macsmc-reboot.

Tested: poweroff now leaves the Mac mini off; reboot still restarts.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: the controller takes the apple,t8142-spmi fallback of the
aurora-wip binding.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
dt-bindings: arm: apple: apple,pmgr: Add T8152 compatible
edd345a 
The T8152 (M6) PMGR blocks are compatible with the T8103 ones.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
dt-bindings: power: apple,pmgr-pwrstate: Add T8152 compatible
2c943f4 
The T8152 (M6) PMGR power state registers are compatible with the T8103
ones.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
dt-bindings: i2c: apple,i2c: Add T8152 compatible
5e49fec 
The T8152 (M6) I2C controllers are compatible with the T8103 ones.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
dt-bindings: mailbox: apple,mailbox: Add T8152 ASC wrapper mailbox
523a1ca 
The T8152 (M6) SMC and AOP mailboxes are ASC wrapper v8 instances,
described with two interrupts (send-empty, recv-not-empty) like the
T8140 AOP setup port, but without an IOMMU or DMA window. Add
apple,t8152-ascwrap-v8-mailbox and split the conditions into interrupt
layout and setup-port resources.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: adapted for aurora-wip, where the SMC mailbox already has its
own apple,t8152-smc-mailbox compatible with this interrupt layout: the
new compatible is described for the AOP mailbox and joins that interrupt
condition. The T8140 setup-port conditions are unchanged.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
dt-bindings: dma: apple,admac: Add T8152 compatible
d237a9a 
The T8152 (M6) ADMAC (ADT admac-evolution,t8152) has its own register
layout, so it is not compatible with the earlier ones.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
dt-bindings: iommu: apple,dart: add apple,retain-translation
f1ce875 
On T8152 iBoot hands dart-sbr over translating for the AOP and the audio
ADMAC without setting the lock bit, and the AOP firmware keeps using the
inherited mappings. Describe the property that tells the OS to inherit
such a DART instead of resetting it, and who owns which root entries.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@Acelogic
soc: apple: mailbox: match the T8152 AOP ASC wrapper mailbox
76188ec 
The T8152 AOP mailbox (ADT aop, iop,ascwrap-v8, mailbox 0 of the bank at
0x310740000) is the same counted FIFO as the SMC mailbox, with the same
send-empty and recv-not-empty interrupts. Match
apple,t8152-ascwrap-v8-mailbox, the compatible of the J873 AOP mailbox
node, to the SMC mailbox layout.

Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
iommu: apple-dart: inherit an unlocked bootloader translation on request
613be37 
On T8152 iBoot leaves dart-sbr translating for the AOP and the audio
ADMAC: streams 0, 1 and 42 have live page tables, and the firmware's own
mappings sit in root slot 16 of each. Unlike the DARTs SPTM locks, the
lock bit is not set, so the driver would reset the DART and pull the
tables out from under the AOP firmware.

With apple,retain-translation the DART is treated as locked: the
inherited roots are kept and Linux publishes its mappings into vacant
root slots.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
dmaengine: apple-admac: support the T8152 layout
5bef582 
The T8152 ADMAC (ADT admac-evolution,t8152; worked out from the macOS
AudioDMAController-T8152 driver and on hardware) keeps the per-channel
register block and the global start/stop/interrupt registers, but:

- the channel blocks are 0x4000 apart, TX n at 0x40000 + 0x4000 n and RX
  n at 0x80000 + 0x4000 n;
- a channel is put in state 2 (+0x30 bits 3:0) and +0x4 is written
  0x029b0000 before it is started, as macOS does;
- the last descriptor word carries a descriptor id 1..255 in its low
  byte, which macOS never leaves at 0;
- the SRAM size registers carry the channel count in bits 31:24, and the
  AP's carveouts start above the firmware's (base 0x1000, 1 KiB blocks);
- only the word size is set in the bus width register.

The descriptor and report FIFO ports are the legacy ones: the RX
descriptor port answers at 0x14000 + 4n, not at the 0x10040 + 4n the
ADT lists.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: adapted for aurora-wip: the descriptor id is set in
admac_write_hw_desc(), which writes every descriptor there, the SRAM
carveout bounds combine with the T8132 split-channel handling, and the
state register is the +0x30 one that aurora-wip programs as
REG_CHAN_BURST on T8132.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
arm64: dts: apple: j873: audio
dd923f2 
Describe the J873 (Mac mini M6) audio: the AOP (mailbox 0x310740080,
firmware started by Linux), dart-sbr (shared with the PMP;
apple,retain-translation for the firmware's tables), the base-ns ADMAC,
the AOP audio node with its DMA channels and MCA power leaves, the
I2C1/I2C3 power states and buses with the CS42L84 jack codec and the
SN012776 speaker amp (ti,bclk-ratio = <250>), and the macaudio card.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: adapted for aurora-wip: the nodes go into
t8152-j873-audio.dtsi, which t8152-j873g.dts includes. There is no PMP
device tree here, so dart-sbr is described directly (as an
apple,t8152-dart with apple,t8110-dart fallback, like the other J873
DARTs), and the I2C power states join the PMGR node that
t8152-j873-qspi.dtsi already describes. The speaker stays off by
default: the J873 macaudio configuration does not admit it.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@sithglan @Acelogic
arm64: dts: apple: j873: describe the fan target and mode keys
bc141c0 
The J873 SMC has F0Tg (target, flt) and F0md (mode, ui8; lowercase, unlike
the F0Md of other machines). With them macsmc_hwmon exposes fan1_target;
with fan_control=1 the fan follows it (2500 -> 2499 RPM within 3 s). In
automatic mode the SMC keeps the fan at its 1000 RPM minimum even at
93 C under full load, so the OS has to drive it.

Signed-off-by: Thomas Glanzmann <thomas@glanzmann.de>
[Acelogic: adapted for aurora-wip, whose T8152 hwmon leaves fan control
to the firmware: the fan node has no apple,fan-manual-control, so the
keys only add a read-only fan1_target. The target becomes writable only
with the fan_control module parameter (unsafe, off by default); nothing
in the kernel writes F0md or F0Tg by itself.]
Signed-off-by: Acelogic <miguelc4600@gmail.com>
@Acelogic
Merge branch 'aurora-wip' into j873g-platform
a15e228 
Bring the J873g platform series up to date with aurora-wip.

The only textual conflict is the include block at the end of
t8152-j873g.dts. aurora-wip includes the shared t8152-peripherals.dtsi
there, followed by J873g overrides of some of its nodes; this branch
includes the J873g NVMe, USB, Ethernet and audio fragments. Keep the
aurora-wip block first and include the J873g fragments after it, since
they refine nodes that the shared file defines.

The shared file also describes four DARTs, disabled and under canonical
labels, that the J873g fragments add as nodes of their own at the same
paths:
- dart-usb1 (dwc3_1_dart);
- dart-usb2 (dwc3_2_dart);
- dart-apcie2 (pcie2_dart);
- dart-sbr (sbr_dart).
dtc would merge the two definitions of each and keep status =
"disabled", which would disable the DARTs of USB, the 10GbE port and
audio. So this merge drops the duplicate nodes, enables the shared nodes
by label from the fragments, and adds the properties that the tested
description had and the shared nodes lack. Doing it inside the merge
keeps every commit bootable on the J873g.

- dwc3_1_dart, dwc3_2_dart: each ADT node holds two DART instances
  (reg[0] and reg[1], 0xc000 each). The shared nodes list them as two reg
  windows, but the DART driver drives one instance per node, and the
  binding reads a second window as DAPF or auxiliary registers. So the
  shared nodes keep reg[0] only, and instance 1 stays a node of its own,
  labelled dwc3_1_dart_1 or dwc3_2_dart_1 as in the other Apple SoC
  device trees. Drop the t8152-j873g.dts overrides of the two-window reg,
  and the comment that calls these ports unexposed: usb-drd1 is the
  back-left port and usb-drd2 serves the front ports through the
  on-board hub.
- pcie2_dart: keep the 0xc000 window that port 2 was brought up with,
  the size that pcie0_dart has in t8152-j873-n1.dtsi. The shared node and
  the ADT give 0x20000.
- sbr_dart: add apple,retain-translation.

Compared with the hardware-tested J873g DTB, the only differences are an
explicit status = "okay" on these four DARTs, the phandle numbering, and
the 39 disabled nodes that the shared file adds.

drivers/iommu/apple-dart.c and drivers/nvme/host/apple.c merge cleanly.
On T8152 the NVMe controller has no separate NVMMU window, so the new
runtime lsq_in_nvmmu stays false. The linear SQ control register and
doorbells therefore stay in the "nvme" window, as before.

Signed-off-by: Acelogic <miguelc4600@gmail.com>
@Acelogic
Acelogic marked this pull request as ready for review November 8, 2026 06:49
@Acelogic
arm64: dts: apple: j873: leave the USB 2 hosts to a follow-up
6962da5 
The J873g USB 2 host nodes describe the back-left (usb-drd1) and front
(usb-drd2) controllers as plain "snps,dwc3" with both DART instances in
iommus. The generic dwc3 binding allows a single iommu, so these nodes
add two dtbs_check warnings. The Apple dwc3 binding, which does allow
two DARTs, needs resets, a USB role switch and PHY descriptions that
the J873g does not have yet.

Return the J873g USB description to the shared, disabled state that
aurora-wip has, until the M6 USB controllers can be described properly:
- drop t8152-j873-usb.dtsi and its include;
- restore aurora-wip's dwc3_1_dart and dwc3_2_dart overrides.

The USB 2 hosts worked on the M6 with the earlier description (both
xHCI hosts and the front-port hub enumerated), and they will come back
in a follow-up together with the binding work.

Signed-off-by: Acelogic <miguelc4600@gmail.com>
@Acelogic Acelogic changed the title J873g: internal SSD, USB 2, 10GbE, power and audio on aurora-wip J873g: internal SSD, 10GbE, power and audio on aurora-wip Nov 8, 2026
@Acelogic
Acelogic merged commit fde6795 into aurora-wip Nov 8, 2026
5 checks passed
@Acelogic Acelogic mentioned this pull request Nov 8, 2026
Merged
Acelogic added a commit that referenced this pull request Nov 8, 2026
@Acelogic
Merge pull request #1205 from aurora-silicon/j873g-usb
2991c10 
J873g: USB 2 hosts as T8152 DWC3 (follow-up to #1197)
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2 participants

@Acelogic @sithglan