[RyanTheTide]

What

apple_pmgr_ps_clear_latch(), added in #1255, now skips its PS reset while the domain is in a system sleep transition, from its suspend_late to its resume_early. During a system sleep a latched power-on fails as it did before #1255: genpd ignores the error in the noirq phase and the ANE quarantines at PM_POST_SUSPEND. Runtime power-ons, including apple_pmgr_ps_cycle(), still run the recovery.

Why

This is the J700 (T8140) "hang on suspend entry": the fleet43 suites and the aneres2 boots stopped at a suspend and came back only through the hardware watchdog. In the system sleep path, #1255 runs the PS reset from the genpd noirq resume, while the ANE_SYS DARTs and engine are still in their noirq phase. That hangs the machine.

Evidence (J700, our own lab runs)

Loop: from a fresh boot, 12 systemd and 12 direct suspends per boot, all with pm_test=platform (one-shot test boots under the dead-man; results in our lab notes):

kernel	#1255 recovery in noirq	boots	hung	ANE_SYS latched, no hang
fleet43-based test kernel (with kdump)	yes	3	3	-
fleet36 (before #1255)	no	4	0	2
same test kernel, #1255 reverted	no	2	0	0
same test kernel, pm_test=freezer / devices (no domain is powered off)	yes	2 / 4	0 / 0	-
this PR (nhfix1 = 55facfa, the fleet44 config)	no (skipped in sleep)	6	0	1 (11 failed power-ons, ANE quarantined, the loop finished)

• None of the hung boots left a "cleared by a PS reset" line, and none of the 45 boots before pmdomain: apple: clear a latched bit 11 with a PS reset on power-on (Neo ANE after sleep) #1255 hung.
• The latch comes early in a boot (ANERES: within the first ~10 resumes, on about 1 boot in 4-8). That is where every hang happened: at uptimes of 1 to 3.5 min.
• drm/apple: answer the DCP PMU temperature query with the battery temperature #1249 is not involved: its battery read was called 0 times after boot, including in the hung run.

KUnit apple-pmgr-pwrstate: 14/14 with this change. pmgr_ps_power_on_latch_sleep_test now expects no PS reset during sleep and the recovery after it. Negative control: the new test fails on the old driver (13/14).

Hardware rows

• J700, nhfix1 (integration 22fceec + this change, same config as fleet44), same loop: 6 boots, 144 suspends, 0 hangs (base rate with pmdomain: apple: clear a latched bit 11 with a PS reset on power-on (Neo ANE after sleep) #1255: 3 of 3 boots hung). One boot hit the real ANE_SYS latch; it reported the failed power-on, quarantined the ANE and finished all 24 suspends.
• J700 FLEET suite, one-shot vs the fleet44 baseline: HARD REGRESSIONS none. kerr 0, AVC 0, failed units 0, ANE 15/0 resumes and 16/16 after sleep, sleeps 6+6, s2idle (RTC) +3/0. The remaining diffs are environmental: a dock with an external display, night rules off, and the speaker interface default from ASoC: apple: macaudio: Serve both speaker protection interfaces #1279.
• No audio path, DT or speaker change (pmgr-pwrstate only), so the user-path speaker gate does not apply.

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