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drm/asahi: g17: M5 Pro: relax a compute kick's parent to the pipelined class once it has retired - #1436
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DjDeveloperr merged 1 commit intoNov 10, 2026
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…d class once it has retired macOS publishes an M5 Pro compute kick with a class-1 parent (held until its parent completes) while the parent is in flight. A kick published after its parent has finished gets the pipelined class 2 and auxiliary control 1 (hv10: 36% of the hop's kicks, each published about 40 us after the queue's previous kick, against 30 us for class 1). Do the same: when the host has retired every earlier kick of the queue, with no replay or recovery pending, the parent takes class 2 and the auxiliary control 1. The firmware then has nothing to hold the kick for. Kicks with a parent still in flight keep class 1 and auxiliary control 0. G17D and the boards without the counted forms are unchanged. Signed-off-by: Diljit Singh <hey@djdev.me>
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Stacked on #1411: its base is #1411's branch. Retarget it to #1012's branch once #1411 lands.
What
macOS publishes an M5 Pro compute kick with a class-1 parent, held until the parent completes, while the parent is still in flight. A kick published after its parent has finished gets the pipelined class 2 and auxiliary control 1. In hv10's hop trace that's 36% of kicks, each published about 40 µs after the queue's previous kick, against 30 µs for the class-1 kicks.
This does the same. When the host has retired every earlier kick of the queue, with no replay, quarantine or witness wait pending, the parent takes class 2 and auxiliary control 1. Otherwise it keeps #1411's class 1 and auxiliary control 0. G17D and the boards without the counted forms are unchanged.
Measured
J714s (M5 Pro). The base is the M5's default kernel
7.3.0-m5-argb2(integration + #1406 + #1364, #1394, #1401, #1070, #1411, #1404, #1425), against the same source plus this commit. Mesa is mesa-aurora with #32 and #33. Fresh boots in the order variant, base, variant, base, with gpubench pinned to CPU 12 (a P core) and measured before anything else on each boot.A small gain:
dEQP with both Mesas (with and without #33) passes: mq-tl 214, mq-v1 427, mq-all 290, synchronization2 600, synchronization 693, s0 109, compute 223, glsl 1209, draw 906, texture 660, occlusion queries 440. That's 0 Fail, with no GPU recoveries or timeouts. gpubench core-a,feat is 41/41 with each Mesa.
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