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rtc: apple: Add Abbey PMU counter and wake alarm support - #246
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Keep the Baku implementation intact and match the Abbey layout explicitly. Use named NVMEM cells, checked little-endian accesses and bounded stable reads. Mask and disarm before programming an alarm, preserve unrelated bits, and fail closed when the interrupt cannot be acknowledged. Manage wake IRQ teardown and provide the native APIF configuration and checked legacy DT migration. Exercise the production reader and alarm transaction without touching hardware. Signed-off-by: Dj <hey@djdev.me>
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Add the Abbey SPMI PMU RTC as a separate driver. The inherited J700/Baku driver remains intact: Abbey uses a 48-bit counter and signed subsecond offset, rather than Baku's register layout and whole-second offset.
The new binding names five NVMEM cells and the optional alarm IRQ. Clock reads reject inconsistent counters/offsets, accesses use explicit little-endian encoding, and alarm updates mask and disarm before changing the comparator. Alarm transactions preserve unrelated mask/control bits. Failed IRQ reads or acknowledgment disable the alarm IRQ and reject further arming until reprobe. Wake IRQ and alarm teardown are managed on probe failure and unbind.
Extend the APIF config fragment and checked DT migration for the matched T6050 Abbey cell contract. No hard-coded board addresses, private implementation references, diagnostic success logs or GPU changes.
Validation: native arm64 RTC, SPMI and NVMEM driver objects; production-function host tests for stable/inconsistent clock reads, transaction ordering and error handling; guest migration tests; binding validation and whitespace checks passed. Hardware wake qualification remains pending.
Depends on generation-4 interrupt support in #245.