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usb: typec: tipd: reconcile J616s DP Alt Mode events - #519
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Publish the entered partner DisplayPort alternate mode, consume SPMI events latched before IRQ registration, expose pin E, and provide the connector fwnode fallback. The tether route gate follow-up belongs with #451 and is included in the batch3 candidate. Assisted-by: LLM
This was referenced Oct 28, 2026
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Landed in integration/aurora through #533 (J616s consolidation, 2026-10-28). |
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…ora-silicon#518, aurora-silicon#516, aurora-silicon#519 and aurora-silicon#451 This is the tree of the J616s test kernel 7.3.0-aurora-j616s-batch5, built from these parents: - wip/j616s-batch1-20261027 (e1a25b5): the J616s bring-up series - integration/aurora 647f084 (includes aurora-silicon#498, aurora-silicon#512, aurora-silicon#523 and DJ's G17 merges) - aurora-silicon#518 ad14f2d: 25G83 tiler growth fix (Jonathan Goyvaerts) - aurora-silicon#516 31340ab: T6040 two-lane DP pin D beside USB3 - aurora-silicon#519 d769aaf: tipd reconcile of firmware-entered J616s DP Alt Mode - aurora-silicon#451 0d43a7f: J616s external displays (František Balázsy) Resolution notes: - aurora-silicon#451's display code supersedes the older aurora-silicon#451 copy carried by batch1, including its desktop 26.6 adaptive sync. Batch1's callback guard, ProMotion presentation timestamps, minRR=0 restore and swap watchdog stay. - The display gate finds a Type-C route's PHY by its typecN name, so aurora-silicon#451's dcpext0 route@0 is not enabled on a tether whose ATC0 PHY is disabled. - aurora-silicon#516's pin D and aurora-silicon#519's tipd reconcile are kept as in the J616s series. Batch2's selftest fixture reconcile for the G17 owner and CLPC fixtures is part of this tree. Tested on the J616s with the follow-up commits: boots with 0 WARN, external display at 1920x1080@180 through DP Alt Mode, 20/20 mode switches and 15/15 DPMS cycles with no new kernel errors. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
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…fixtures aurora-silicon#519 makes the CD321x update publish the DisplayPort mode the firmware entered as a partner altmode, and drop it with the partner. The probe now takes the connector from a "displayport" reference when the port has one. The tipd host fixtures did not know either, so 24 of them stopped building. - lifecycle: carry partner_altmode_dp and the DP mode VDO, and count partner altmode registration against removal. - quiesce and the transaction fixtures built on it: carry partner_altmode_dp. They never enter DP on the partner, so the altmode helpers assert they are not reached. - pm: report a "displayport" reference, which the probe fixtures already resolve, and assert the port-node fallback is not taken. No assertion is relaxed. apple-dcp host selftests: 80/80. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org> Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Summary
Carry the J616s CD321x/Tipd DP Alt Mode event reconciliation onto
wip/j616s-gpu-parity-20261026at06c5dbbf(after the #498 and #512 mergeheads). The CD321x firmware performs DP discovery and Enter Mode; the driver
publishes the entered partner mode, updates its active state, and removes it
on disconnect. The SPMI probe consumes an event latched before IRQ setup.
The port advertises C/D/E pin assignments and provides a connector fwnode
fallback.
This follows the public tipd event pattern in #487. It contains only the
three Type-C files that apply to the parity branch. The fourth hunk in the
dp3 candidate skips the tether-reserved ATC0 display route; it depends on
the external T6041 gate introduced by #451 and is included in the separate
batch3 boot candidate. Please keep this PR in draft until the external gate
series and J616s display measurements are reviewed.
Host verification
build in the dp3-u2 candidate.
result and module vermagic are recorded in the boot candidate.
plan checks partner SVID
0xff01, active mode, pin assignment, HPD, ATCroute, DRM connector, EDID, visible modes, colour and retained USB3.