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spi: apple-qspi: admit verified NVRAM writes on the J700 (asahi-bless works) - #673

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RyanTheTide merged 2 commits into
aurora-wipfrom
reland/qspi-j700-nvram-house-trailers
Oct 31, 2026
Merged

RyanTheTide merged 2 commits into
aurora-wipfrom
reland/qspi-j700-nvram-house-trailers

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@RyanTheTide RyanTheTide commented Oct 31, 2026 •

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Supersedes #626 (#626). Recreates its functional changes on current aurora-wip (58d41ca2f87d) with corrected house trailers. Every new commit ends with contiguous Assisted-by: LLM and Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>, with no Co-Authored-By line.

The J700 uses the opt-in, bounded, verified NVRAM write policy and 4 KiB SPI NOR erase sectors. The two original functional patches are unchanged.

Review/merge this replacement first.

Validation on all three replacement heads:

  • Arm64 LLVM W=1: spi-apple-qspi.o and spi-apple-qspi-policy-test.o build (defconfig + asahi.config, C-only CONFIG_RUST=n).
  • Unmodified tools/asahi/qspi-nvram-tests.py: ASan/UBSan harness and changed-guard controls pass on Linux.
  • git log --format=%B checked for every introduced commit; git diff --check clean.
  • Each replacement tree equals a conflict-free git merge-tree --write-tree <current-base> <old-head> result. Context-free stable patch IDs match the original functional commits.

Whole old-head/new-head diffs contain the newer base changes (including #665/#668/#669); making those diffs empty would revert landed work. No implementation changes beyond the original patches are introduced.

No new hardware qualification or power-saving measurement is claimed. Existing qualification and remaining lead checks are documented in the superseded PRs. No existing branch was rewritten, no force push was used, and no old PR was closed or merged.

Assisted-by: LLM

🤖 Generated with Claude Code

asahi-bless cannot select a one-time boot volume on the MacBook Neo
(J700). The T8140 path admitted programs and erases inside the nvram
partition with no runtime opt-in and no readback, while the J613 and
J713 go through the read-only, opt-in, verified policy. Writes still
never reached the flash, because the partition was read-only in MTD.

Put the J700 on the same policy. The controller starts read-only and
root opts in at runtime through the read_only parameter. A write
needs the J700 board and the controller at 0x385110000. Programs are
single-wire, three-byte, within one 256-byte page; erases are aligned
4 KiB sectors; both must lie inside the nvram partition. Every
mutation checks the JEDEC ID and status first, is verified by
readback, and a fault latches the driver read-only.

The J613/J713 partition is pinned at 0x700000. The J700's comes from
its device tree (0x24000, size 0x1d0000), so the range check now takes
the partition bounds, and a DT window must fit in three-byte
addressing. The J700 flash is a W25Q16JV (JEDEC ef6515). iBoot leaves
BP0 set, which protects the top 64 KiB, so the J700 tolerates the
block-protect bits as found: the driver never changes them, the flash
ignores writes in that range, and readback then latches read-only.
CMP, suspend, WPS, BUSY and WEL are still refused.

T8140 data reads keep their multi-line pass-through. KUnit and the
host harness now cover the shared policy at the J700 bounds, the J700
board gate and the block-protect tolerance.

Assisted-by: LLM
Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
The J700 nvram partition starts at 0x24000 on its boot NOR. SPI-NOR
picks the largest uniform erase size unless MTD_SPI_NOR_USE_4K_SECTORS
is set, so the flash reports 64 KiB erase blocks and MTD forces the
partition read-only because it does not start on an erase boundary.
asahi-bless then cannot set a boot volume.

There is no device tree or per-flash way to choose the erase size;
this option is the only switch, and it is the upstream default. The
Fedora base config turns it off. Set it again. The Apple NVRAM
partitions are managed in 4 KiB units, and the QSPI NVRAM policy on
the J613, J713 and J700 only admits 4 KiB erases anyway. Other SPI NOR
users only see smaller erase blocks.

Assisted-by: LLM
Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
@RyanTheTide

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Hardware-tested in the fleet12 kernel (7.3.0-aurora-fleet12): the same eight files are byte-identical to the tested tree. Booted one-shot and default on the Neo, M2, M1 Pro and J616s with no new err-level lines. On the Neo the nvram partition shows 4 KiB erase blocks, the T8140 controller runtime-suspends between accesses, and nvram reads work while read_only stays Y. The J616s DT half needs its Stage 2 DTB refresh before it takes effect there.

🤖 Generated with Claude Code

@RyanTheTide
RyanTheTide merged commit 6ee4694 into aurora-wip Oct 31, 2026
@RyanTheTide
RyanTheTide deleted the reland/qspi-j700-nvram-house-trailers branch October 31, 2026 05:52
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