Add NEON optimizations for SynetQuantizedMergedConvolution Cdc/Cd/Dc

[ermig1979]

Summary

• Port SynetQuantizedMergedConvolutionCdc, SynetQuantizedMergedConvolutionCd, and SynetQuantizedMergedConvolutionDc from the SSE4.1 kernels to ARM/ARM64 NEON.
• New sources: SimdNeonSynetQuantizedMergedConvolution.cpp, Input.cpp, Depthwise.cpp, and Output.cpp (input 1x1 GEMM, packed depthwise 3x3/any, output 1x1 GEMM, residual add).
• Wire Neon::SynetQuantizedMergedConvolutionInit into SimdSynetQuantizedMergedConvolutionInit, add NEON QuntizedTerm8i helpers, extend AutoTest, update VS2022 Neon project files, and document the change under release 7.2.165.
• Fix ARM64 quantized rounding: QuntizedTerm8i and residual QuantizedAdd now use vcvtnq_s32_f32 (ties-to-even), matching Base std::nearbyint and SSE _mm_cvtps_epi32. The previous NEON Round() path (half away from zero) caused off-by-1 mismatches such as CDC 1x32x56x56-192x1x1-5x2-56x1x1.

Validation

• AArch64 cross-compile of the four NEON sources succeeded (aarch64-linux-gnu-g++ -march=armv8-a+crc), including after the rounding change.
• Native x86 Release build succeeded; ./Test "-r=.." -fi=SynetQuantizedMergedConvolution -tt=1 -ts=1 finished successfully (NEON is not selected on that host).

Test plan

• Cross-compile Neon sources for aarch64 and confirm the new files build.
• Native x86 Release build + SynetQuantizedMergedConvolution AutoTest.
• On ARM/ARM64 hardware, rebuild and run ./Test "-r=.." -fi=SynetQuantizedMergedConvolution -tt=1 -ts=1 and confirm Neon vs Base (exact compare). The previously failing case is [3:1x32x56x56-192x1x1-5x2-56x1x1].