Increase SVE2 QuantizedMergedConvolution GEMM unroll M from 5 to 12 - #857
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SVE has 32 vector registers, so the input and output 2xM kernels can keep 12 spatial rows (24 accumulators plus weights/src) instead of 5. Co-authored-by: igor.ermolaev <igor.ermolaev@altezza.org>
ermig1979
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August 13, 2026 10:29
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Raise the SVE2 input/output 1x1 GEMM microkernel unroll
Mfrom 5 to 12 forSynetQuantizedMergedConvolutionCdc,SynetQuantizedMergedConvolutionCd, andSynetQuantizedMergedConvolutionDc.SVE provides 32 vector registers (NEON has 16), so the previous
M=5cap left registers unused. The 2-wide (dstC > F) kernel now keeps 12 spatial rows: 24 accumulators plus source/weight vectors, which fits in the SVE register file.Changes
SimdSve2SynetQuantizedMergedConvolutionInput.cpp:QuantizedMergedConvolutionInput_2xMsupportsM=1..12; main tile sizen = 12.SimdSve2SynetQuantizedMergedConvolutionOutput.cpp:QuantizedMergedConvolutionOutputConvolution_2xMsupportsM=1..12; main tile sizen = 12.offs0/offs6reuse ofsrc0..src5, hexMindices0x0..0xC).Based on
dev. Depthwise kernels are unchanged.Verification
AArch64 cross-compile of the SVE2 input/output/depthwise/init sources and
TestSynetQuantizedMergedConvolution.cppsucceeds with-march=armv9-a+sve+sve2+i8mm+bf16. This environment is x86_64, so native SVE2Testwas not run. Please re-run./Test "-r=.." -fi=SynetQuantizedMergedConvolutionon ARM.