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bench: add riscv support to TIMFUNC - #615

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Jul434:bench-riscv-impl
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Jul434 wants to merge 1 commit into
libtom:developfrom
Jul434:bench-riscv-impl

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@Jul434

@Jul434 Jul434 commented Oct 26, 2026

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This PR adds 64-bit RISC-V support to the TIMFUNC macro used for timing tests in the demo.

Spotted by Amphimixis.

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