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drm/asahi: admit opted-in J615 on the shared 26.6.2 profile - #310

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satchlj wants to merge 10 commits into
omacom:integration/aurorafrom
satchlj:gpu26-j615-20261031
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satchlj wants to merge 10 commits into
omacom:integration/aurorafrom
satchlj:gpu26-j615-20261031

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@satchlj

@satchlj satchlj commented Oct 31, 2026

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Part 6 of the GPU26 series (stacked on #303–#307 and #301/#302, so it contains their commits; review only the last commit). Requested in #301 (comment).

The 26.6.2 (25G83) IPSW ships the same GPU, DCP and PMP firmware for the 13-inch (J613) and 15-inch (J615) M3 Air, and the J615 ADT matches J613's in every node this path uses. This lets J615 onto the extended profile, but only behind the same exact opt-in m1n1 and the DCP code already require (chosen.asahi,j615-25g83-experimental = "1"), and only when the board identity is unambiguous. The DT, DCP, mailbox and m1n1 side already handle the shared profile; no J615-specific tables are added. J613 behaviour is unchanged.

Not qualified on J615 hardware. We don't have a J615. A lab test plan, safe-return steps and the 14.8.3 vs 26.6.2 comparison recipe are here: https://gist.github.com/satchlj/fb5c04c6b379319fc5ca2c5da3678a8c

Validation: the selection test covers the opt-in and board-identity matrix; host suites and KUnit pass (1,734 pass, 3 skips) on the stack.

Use the PMGR provider active-state predicate when checking inherited
display power. DISP_CPU can report ACTUAL=4 with AUTO_ENABLE and
TARGET=15 after automatic clock gating. Keep the checks read-only and
preserve all other handoff requirements.

Test all actual, target and automatic-state combinations and the
captured J613 state through the production helper.

Signed-off-by: Satya Benson <satya@benson.earth>
The 25G83 device tree advertises the AGX-specific compatible followed by
asc-mailbox-v4. Both bind the same mailbox operations. Admit this exact
pair while retaining all resource and identity checks.

Exercise the production rejection predicate with public-DTS fixtures and
resource mutations; allow optional local DT captures for reproduction.

Signed-off-by: Satya Benson <satya@benson.earth>
Cross all 512 ACTUAL/TARGET/AUTO combinations with zero, all-set,
alternating and individual unrelated-bit patterns. This verifies that
readiness ignores every bit outside the three PMGR fields.

A temporary ACTUAL mask widened from GENMASK(7, 4) to GENMASK(8, 4)
passes the old cases but fails the new ones at both -O0 and -O2.
Make the unoptimized compiler flag explicit and report failing words.

Signed-off-by: Satya Benson <satya@benson.earth>
Signed-off-by: Satya Benson <satya@benson.earth>
…records

Separate firmware identity, HAL metadata and VM bounds from physical
G15G stream selection. Add checked root and owned IO descriptor encoders.
Introduce slot 28 at SGX+0xd50000 with a production-writer regression;
the shifted T8132 bank is never introduced. Keep VM padding zero.

Signed-off-by: Satya Benson <satya@benson.earth>
Build extended initialization owners, controller images and channel
records with checked allocation spans. Publish the bounded loader table
through existing M3 ownership. Keep extended runtime admission closed.

Signed-off-by: Satya Benson <satya@benson.earth>
Construct native queue, pool, context and notifier records. Read
controller inputs from the admitted OPP handoff, preserve nanosecond
durations and reject unsupported optional flags. Prepare native startup
without enabling extended admission.

Signed-off-by: Satya Benson <satya@benson.earth>
Dispatch extended firmware compute records through the existing M3
runtime while preserving G15 CDM streams. Retain owned pool backing and
leave firmware-managed register setup to the extended interface.

Signed-off-by: Satya Benson <satya@benson.earth>
Encode extended tiler and fragment work, scene records, independent
notifications and attachment visibility through the existing runtime.
Retire native pools and enable only the exact J613 26.6.2 profile.
Keep the public UAPI and physical G15 stream formats unchanged.

Signed-off-by: Satya Benson <satya@benson.earth>
The 26.6.2 (25G83) IPSW ships the same GPU, DCP and PMP firmware for
the 13-inch (J613) and 15-inch (J615) M3 Air, and the J615 ADT matches
J613's in every node this path uses. Allow J615 onto the extended
profile, but only with the same exact opt-in m1n1 and the DCP code
already require (chosen asahi,j615-25g83-experimental = "1"), and only
when the board identity is unambiguous. J613 behaviour is unchanged.

This has not been qualified on J615 hardware.

Signed-off-by: Satya Benson <satya@benson.earth>
@satchlj

satchlj commented Nov 11, 2026

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Claude Fable 5.2 on @satchlj's behalf

Closing in favour of aurora-silicon/linux#970, where this change is now maintained against aurora-silicon/linux integration/aurora (still open there).

@satchlj satchlj closed this Nov 11, 2026
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