[p4ulcristian]

This makes the PMU's RTC wake alarm work on T8112 (M2): rtcwake, and timed wakes from s2idle. It is one device-tree commit on top of #351 (T600x), and needs #351's rtc_alarm_event cell and driver change. Only the last commit is new; the five before it are #351. Draft until #351 merges; I'll rebase then.

Patch

arm64: dts: apple: t8112: describe the alarm:

• nub-spmi0 as an interrupt controller on AIC 384;
• the alarm's nvmem cells on the Stowe PMU, at the offsets in macOS's device tree: info-rtc_alarm_ctrl 0xf800, info-rtc_alarm_offset 0xf808, info-rtc_alarm_event 0xf80c, info-rtc_irq_mask_offset 0xf80e;
• the rtc node's five cells, its interrupt (peripheral interrupt 2 of nub-spmi0) and wakeup-source.

No driver change:

• T8112's SPMI controller has 256 peripheral interrupts (macOS lists the controller's own events from 256 on), so the existing layout fits.
• rtc-macsmc from t600x: PMU RTC wake alarm (SPMI notify at 192, Maverick event clear, DT) #351 works as it is.

How the Stowe PMU behaves (read and written by hand through the nvmem device before any driver used the cells):

• Armed, the control byte reads 0x41. On the alarm's second it reads 0x03 (enable cleared, event set) and the event byte at 0xf80c reads 1. 5 of 5 alarms fired on the second they were set for.
• Writing 1 to the event byte clears both the event byte and the control byte's event bit.
• Writing the control byte back does not clear either, with the event bit written as 1 (the T6030 way) or as 0.

So Stowe needs the rtc_alarm_event cell like the Maverick PMUs. One difference from #351's comments: on Stowe the control byte's event bit is cleared by the event-byte write, not by writing that bit as 0. The driver's sequence handles both.

Testing on J413 (MacBook Air 13" M2, 2022), linux-aurora 7.2.11.aurora16-1, m1n1-aurora 1.6.1.aurora23-2, Omarchy on GRUB:

• Setup: rtc-macsmc from t600x: PMU RTC wake alarm (SPMI notify at 192, Maverick event clear, DT) #351 built as an out-of-tree module (updates/, in the initramfs), and t8112-j413.dtb built from this patch applied to the aurora16 source (bed544b). Built the same way, the unpatched source gives a dtb byte-identical to the one the package ships.
• Awake: 3 alarms through /sys/class/rtc/rtc0/wakealarm, 3 interrupts, each on its second, event cleared and alarm disarmed after each.
• s2idle, dtb built from this patch: 5 of 5 rtcwake -m freeze -s 20 ended on the alarm (/sys/power/pm_wakeup_irq is the macsmc-rtc interrupt each time).
• s2idle, the same description edited into the shipped dtb (earlier boot): 13 of 13 at 20–30 s, and 1 of 1 at 3600 s on battery.
• Sleep draw: about 1.0 W in s2idle (602 s, the SMC charge counter charge_counter fell by 50892 mA·s, 84.5 mA average at 12.1 V; Wi-Fi associated, lid open, nothing attached; one sample). Corrected: an earlier version of this text said 0.40 W. That came from energy_now over the 3600 s sleep; energy_now is the gauge's remaining-capacity estimate, which is stale right at wake and fell a further 0.46 Wh within 25 s of waking.

macsmc-rtc macsmc-rtc: registered as rtc0
128:  ...  apple_spmi   2 Edge   macsmc-rtc
run 1: rc=0 back after 22s wake_irq=128 alarm_irqs=1
run 5: rc=0 back after 22s wake_irq=128 alarm_irqs=5
DONE success=5 fail=0

Not tested

• J415, J473 and J493: their device trees compile with the patch (kernel scripts/dtc), nothing more. I have no such Mac.
• Wake with the lid closed, and wake with an external display attached.
• A full kernel build: the dtb and the module were built on their own.
• dt_binding_check / dtbs_check.

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