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docs(r05): Parts 3-5 — Processes/Signals/Privilege, Memory, IPC - #5

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Jul 19, 2026
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Chapters 11-20 + 10 tri-language examples. pmon grows v0→v5 (fork/exec/wait → signalfd supervision → pidfd engine → VM capability-drop → pipe log pipeline → UDS control plane with SCM_RIGHTS fd passing); shmkv v0→v1 (one on-disk format read byte-identically across all three languages, then futex+seqlock coordination with an IPC latency matrix); memmap, allocbench. First VM example (ch14) verified live on systems-target with a negative control. 57/57 runner matrix PASS.

…1-20)

pmon v0-v5 (lifecycle, signalfd supervision, pidfd engine, VM capability
drop, pipe log pipeline, UDS control plane + SCM_RIGHTS), memmap, shmkv
v0-v1 (cross-language on-disk format, futex/seqlock coordination),
allocbench. 17 diagram pairs. Adversarial validation: 57/57 matrix PASS
incl. VM lane 14 negative control; codetabs verbatim; interop verified.
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patterncatalyst merged commit 98bf864 into main Jul 19, 2026
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patterncatalyst deleted the docs/r05-parts-3-5 branch July 19, 2026 04:32
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