utility: support automatic low-speed clock detection

[haydenth]

Problem

In custom or cost-optimized STM32WB designs, the external 32.768 kHz LSE crystal is often omitted to save board space and BOM cost (using internal LSI or HSE/1024 instead). However, the library currently unconditionally hangs inside waiting for the LSE oscillator to be ready:

  LL_RCC_LSE_Enable();
  while (!LL_RCC_LSE_IsReady()) {} // Hangs forever on LSE-less designs

Solution

This PR updates to dynamically read the configured RF Wakeup clock source from the registers (LL_RCC_GetRFWKPClockSource()) and only initialize what is actually selected by the system:

• LSE: Safe, backwards-compatible, and executes the original LSE enable-and-wait sequence.
• LSI: Safely enables LSI1 and waits for it to stabilize.
• HSE_DIV1024: Skips any low-speed clock initialization since the high-speed crystal is already active.

This makes the library universally compatible with any custom LSE-less hardware layout out-of-the-box without requiring any user configuration flags or macros.