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rv32e
Here are 6 public repositories matching this topic...
A RISC-V CH32V003 embedded UART driver in pure RV32EC Assembler w/ tutorial.
embedded assembly assembler badge riscv verilog assembly-language defcon uart assembly-language-programming badges risc-v verilator riscv32 rv32e badgelife ch32v003 verilator-testbench defcon34 rv32ec
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Aug 2, 2026 - Assembly
Fault-tolerant RV32E RISC-V core in SystemVerilog. Features TMR PC/ALUs, DMR fail-safe control unit, and SEC-DED ECC regfile. Complete RTL-to-GDSII ASIC implementation in Cadence Genus & Innovus on 90nm standard cells @ 100 MHz (0.0 ps slack, 0 DRC/LVS violations, GDSII layout verified).
fpga fault-tolerance systemverilog fault-injection risc-v xilinx-vivado tmr compliance-testing rv32e asic-design nexys4-board cadence-innovus cadence-xcelium cadence-genus sec-ded
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Oct 21, 2026 - Verilog
RV32E core for TinyTapeout, codename "Montréal".
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Oct 1, 2026 - SystemVerilog
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