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Add the C6 on-chip flash subsystem (ROM API + MMU map) mirroring the existing C3 one, and rename the C3 flash modules to an esp32c3_ prefix so the two SoCs share a symmetric naming scheme. C6 on-chip flash (new): - esp32c6_rom.rs: ROM spiflash legacy API bindings (erase/read/write). - flash_mmap_c6.rs: C6 MMU cache mapping (rom_mmu_map/unmap). - internal_flash_c6.rs: ROM unlock + capacity probe + esp32-flash0 block device registration. - esp32c6_flash.rs: loadable-image Misc device with map_exec/map_drom entry points for XIP load of external ELF. C3 rename (esp32_* -> esp32c3_*): - esp32_rom.rs -> esp32c3_rom.rs - internal_flash.rs -> internal_flash_c3.rs - flash_mmap.rs -> flash_mmap_c3.rs - esp32_flash.rs -> esp32c3_flash.rs - All `use super::esp32_rom` / `flash_mmap::` references updated; the C3 `loadable_region_reserves_xip_window` test is kept. drivers/flash/mod.rs: - C3 module declarations renamed + gated with all(soc_esp32c3, esp32_internal_flash). - C6 module declarations added, gated with all(soc_esp32c6, esp32_internal_flash). Boards: - esp32c6_devkitc_1: add ESP32_INTERNAL_FLASH Kconfig, LOADABLE_REGION consts (base 0x20_0000 / size 0x30_0000), and flash init in init(); link.x keeps the EXTRA_RAM 64 KiB split for loadable-app RW data and restores the mesh EXTERN kept by upstream. - seeed_xiao_esp32c3: add ESP32_INTERNAL_FLASH (default y) and widen the on-chip flash init gate to all(soc_esp32c3, esp32_internal_flash). Scope: on-chip flash only. No LCD/touch/net/NOR-spi-flash changes. Co-Authored-By: Claude Code <noreply@anthropic.com>
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flash_mmap_c6.rs imports DROM_VADDR_BASE/DROM_VADDR_END/IROM_VADDR_BASE/ FLASH_MMU_PAGE_SIZE from crate::boards, but the C6 board only defined the LOADABLE_REGION_* constants, so agent_loop failed to compile. C6 splits the flash-cache window into separate I-bus (0x4200_0000) and D-bus (0x4280_0000) halves, unlike C3's DROM at 0x3C00_0000. Page size is 64 KB, matching Cache_MMU_Set's psize argument in esp32c6_rom.rs. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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build_prs #470 vivoblueos/build#81 |
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build_prs #470 vivoblueos/build#81 |
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build_prs #470 vivoblueos/build#81 |
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Description
This branch adds ESP32-C6 on-chip Flash access and executable XIP mapping support, mirroring the existing C3 implementation. A reserved Flash region is exposed as
/dev/esp32-flash0, allowing userspace loaders to erase, read, write, map, and unmap executable images without embedding ELF or image-management logic in the kernel. The C3 Flash modules are also renamed to anesp32c3_prefix so the two SoCs share a symmetric naming scheme.Main changes
Internal Flash driver
spiflash_legacySPI Flash API (the same chip-less path as C3, avoiding the higher-levelesp_flash_tAPI which NULL-dereferencesdefault_chip).Device registration
Registers the reserved internal Flash region as the misc device:
/dev/esp32-flash0Adds versioned ioctl requests for:
XIP mapping
CACHE_MSPI_MMU_SETdirect writes (C6 maps code and rodata into a single0x42000000window, unlike C3 which has separate0x3C000000DROM and0x42000000IROM windows).fence.iafter mapping changes.Configuration
Adds the
ESP32_INTERNAL_FLASHKconfig option (default y) to gate the C6 on-chip Flash subsystem.The loadable region constants are defined in the board module:
0x002000000x003000000x00500000Board integration
esp32c6_devkitc_1/link.xkeeps the HP RAMEXTRA_RAM64 KiB split (RAM0x40800000LENGTH0x5E610+ topEXTRA_RAM0x10000) to host loadable-app RW data; restores the upstreammesh_sta_auth_expire_timeEXTERN./dev/esp32-flash0before VFS initialization.C3 naming symmetry
Renames C3 Flash modules to match the C6 scheme:
esp32_rom.rs→esp32c3_rom.rsinternal_flash.rs→internal_flash_c3.rsflash_mmap.rs→flash_mmap_c3.rsesp32_flash.rs→esp32c3_flash.rsuse super::esp32_rom/flash_mmap::references updated; the C3loadable_region_reserves_xip_windowtest is kept.Unifies the
all(soc_esp32cN, esp32_internal_flash)gate across C3 and C6 module declarations; addsESP32_INTERNAL_FLASH(default y) to the seeed C3 board and widens its on-chip Flash init gate fromsoc_esp32c3toall(soc_esp32c3, esp32_internal_flash).