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PTX: handle atomics on local memory - #963
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## main #963 +/- ##
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PTX has no atomics on the stack (local memory): ptxas rejects the `atom.local.cas` that NVPTX selects for a `cmpxchg` on an `alloca`, atomic loads and stores on the stack become `ld.acquire` and `st.release` of generic addresses, which PTX leaves undefined, and NVPTX only demotes `atomicrmw` on pointers it knows to be local, and only when optimizing. Atomics on stack slots also failed validation for no reason, e.g., system-scope ones before sm_60. Like on Metal and SPIR-V, replace atomics on the thread's own memory by plain accesses from `finish_ir!`, after optimization and before validation. On PTX, pointers in the local address space are private too. Co-authored-by: Tim Esselens <tim.esselens@gmail.com>
Atomics on generic pointers that point to the stack are undefined in PTX, and fail on Pascal GPUs with CUDA_ERROR_INVALID_ADDRESS_SPACE, which leaves the context unusable. Enzyme emits them when it accumulates into the shadow of an argument without seeing where the argument points, e.g., when a stack slot of the caller is passed to a function that isn't inlined (Enzyme.jl#428). Inlining hides the problem only sometimes. Like NVIDIA's libcu++ does for `cuda::atomic_ref`, check `isspacep.local` before atomic operations on generic pointers that may point to the stack, and perform the operation with plain accesses on local memory. The atomic that is kept for other memory gets `!noalias.addrspace` metadata, so that it isn't checked again. Pointers known to point to global or shared memory are left alone, and NVPTX folds the check when it can infer the address space, e.g., for pointers passed to a kernel. Julia's `unordered` accesses of heap references aren't checked: they are not used to synchronize, and NVPTX only lowers them to the relaxed loads and stores that local memory doesn't support from sm_70 on, where they haven't been seen to fail. Co-authored-by: Tim Esselens <tim.esselens@gmail.com>
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October 16, 2026 15:13
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I'd rather this would be fixed in NVPTX, but a workaround is fine for now. Rebased, and slightly reworked; will merge when it passes CI. |
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Thank you! Will report back with Pascal tests |
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Confirmed on Pascal (GTX 1080, Linux, Julia 1.12.7): the ptx tests and CUDA.jl's atomics tests pass, and the Enzyme reverse-mode kernel that failed with CUDA_ERROR_INVALID_ADDRESS_SPACE (717) before this PR now gives the right result. |
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PTX only defines atomic instructions (
atom,red, and relaxed, acquire or release loads and stores) on global and shared memory, and on generic addresses that point there. On the stack they are undefined, and two things go wrong in practice:CUDA_ERROR_INVALID_ADDRESS_SPACE, which leaves the context unusable (V100 reportedly fails sometimes; newer GPUs have run it fine so far). Enzyme emits these: when a stack slot of the caller is passed to a function that isn't inlined, the adjoint accumulates into its shadow with anatomicrmw fadd, because Enzyme can't see where the pointer points (CUDA Error 717: Invalid Address Space -- Atomic operation not supported on stack memory. EnzymeAD/Enzyme.jl#428). WaterLily.jl's reverse-mode kernels crash this way.atomicrmwto plain accesses, but only when optimizing, and nevercmpxchg, for which it selects anatom.local.casthat ptxas rejects (NVPTX selectsatom.localfor atomics on local memory, which ptxas rejects CUDA.jl#3402):This PR handles both from the PTX
finish_ir!, after optimization and before validation, the way the Metal and SPIR-V back-ends already deal with atomics on thread memory:alloca, or in the local address space) become plain accesses, since no other thread can access that memory. They also no longer fail validation, e.g. for system scope before sm_60.isspacep.localat run time, and use plain accesses on local memory and the original atomic otherwise. That is what NVIDIA's libcu++ does for everycuda::atomic_refoperation, on every architecture (Fix UB in atomics with automatic storage NVIDIA/cccl#2586), and what AMDGPU does in its back-end for flat atomics that may hit private memory. The kept atomic gets!noalias.addrspacemetadata, so it isn't checked again.Atomics on global or shared pointers, which is what CUDA.jl's arrays use, are left alone, and NVPTX folds the check when it can infer the address space, e.g. for kernel arguments. In the worst case, a generic atomic in a callee that isn't inlined, a kernel doing 256 atomic additions per thread took 0.60 ms with and without the check on an RTX 5080.
The check covers
atomicrmw,cmpxchg, and atomic loads and stores that are at least monotonic. Julia'sunorderedaccesses of heap references aren't checked, as they are too common to pay for it: NVPTX only lowers those to the relaxed instructions that the stack doesn't support from sm_70 on, where they haven't been seen to fail.The new tests in
test/ptx.jlwork on IR and PTX, and pass on Julia 1.10 (typed pointers) and 1.13. On an RTX 5080, a kernel doing acmpxchgon a stack slot fails to compile on main and runs correctly with this PR, as do atomics in a non-inlined callee on its caller's stack slot. I could not test on a Pascal GPU.