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cuda-oxide: preserve rustc reference attributes on kernels - #1483
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Update CUDAoxide from `nightly-2026-08-28` to `nightly-2026-10-11`. This brings in rust-lang/rust#163242, needed for the separate kernel parameter-attribute work in #1483 (related to #1088 and #1098). ## Changes - Adapt to rustc API changes, generic floating-point intrinsics, and integer min/max. - Follow the new `core::intrinsics::reflection::type_id` path in the kernel-name helper. - Update toolchain/Nix pins, diagnostic snapshots, and intrinsic evidence. Intrinsic declarations are unchanged. ## Validation - CI: 55 passed, 7 expected skips; all 234 examples compile. - Compiler tests, formatting, clippy, and IR comparison pass. Targeted checks pass on both RTX 5090s with no memcheck errors. - GPU sweep: 232/233 passed. The existing FP8 example failure is addressed separately in #1487; hardware-limited cases retain compile-only coverage. The existing scaffold issue—mixing registry and Git runtime types—also remains a separate follow-up. ## Checklist - [x] All commits signed off - [x] SPDX headers on new source files, where applicable --------- Signed-off-by: nihalp <nihalp@nvidia.com>
Signed-off-by: nihalp <nihalp@nvidia.com>
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Defer explicit readonly while retaining rustc noalias and whole-call dereferenceability. Check volatile accesses and ordinary load reuse through actual code generation. Correct atomic example pointer contracts and accept valid cached vector loads. Signed-off-by: nihalp <nihalp@nvidia.com>
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I filed LLVM #230960 with a standalone reproducer: This PR keeps |
This was referenced Oct 11, 2026
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Use rustc's
noaliasand provendereferenceable(N)facts oncuda-oxidekernel references. This lets LLVM reuse input reads across writes to separate outputs.Raw pointers and
DisjointSlicestorage receive no new attributes. Rust's interior-mutability, pinning, and lifetime rules still apply. Explicitreadonlyis deferred because current NVPTX backends can lose volatile reads.Includes regression tests, corrected atomic example pointer contracts, and load-width checks that accept cached loads.
Validation: compiler/backend suites and strict checks pass; reference launches pass memory, race, and synchronization checks on both RTX 5090s. LLVM and both NVVM paths preserve two volatile reads while combining ordinary reads. Final hosted CI is pending.
The existing FP8 failure is handled by #1487. The existing AtomicF16 sanitizer failure remains a separate follow-up.
Partially addresses #1088 and #1098.
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