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pmdomain: opt-in T6000/T8112 PMP and T8112 AVD VMAX - #1020

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RyanTheTide wants to merge 7 commits into
integration/aurorafrom
ctl/t-4829-m2-t8112-m1-pro-t6000-pmp-under-linux-and-the-t8
Closed

RyanTheTide wants to merge 7 commits into
integration/aurorafrom
ctl/t-4829-m2-t8112-m1-pro-t6000-pmp-under-linux-and-the-t8

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@RyanTheTide

@RyanTheTide RyanTheTide commented Nov 6, 2026 •

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Superseded by #1064, rebased without force-pushing after the binding conflict. All new-head software receipts and the PWR qualification proposal are posted in the receipt comment. The replacement and paired Aura #88 remain hardware-gated drafts; no merge is authorized.

The original source and review history are retained below for comparison.

Summary

  • make T6000/T8112 PMP activation an explicit APPLE_USE_PMP profile while keeping normal board DTs disabled
  • document and validate the resident-firmware inputs that Aura copies from the current ADT
  • publish report status on providers without sensors and add host coverage for the M1 Pro/M2 graphs
  • qualify the T8112 AVD SOC-DEV-DVFS entry 0xb0, request floor 2 only while AVD is active, and release it before residency
  • preserve the ordinary J413 physical-only AVD graph unless APPLE_USE_PMP is selected

PR #933 is complementary: it enables T6020/J414s using its existing bootloader handoff. It does not supply the missing T6000/T8112 ADT identifiers. A read-only J316s live-DT audit confirmed the existing PMP node has neither required identifier; no value or private DT is included here.

Validation

  • git diff --check: pass
  • commit trailers: exactly the requested Signed-off-by and Assisted-by on every commit
  • Aura synthetic ADT/real-libfdt PMP test: pass
  • full registered host suite: final complete-history bundle retry h-48570 is approved/queued; earlier retries retained invalid linked/shallow Git source evidence rather than hiding it
  • arm64 QEMU apple-pmp* KUnit: h-48338, 32/32 pass (14 startup, 4 T8112 DVFS, 14 report)
  • integration config Image/modules/DTBs: pinned-bindgen retry h-48576 is approved/queued; default bindgen failed the known EFI alignment check
  • five baseline/PMP/legacy-loader DT profiles: h-48345, all pass

Hardware gate — do not merge

This is a draft and must remain hardware-gated. The RAM-only kit is staged at reports/revq-kits/m2-pmp-vmax/ outside this repository.

Before merge, the tethered J413/T8112 run must prove fresh PMP startup/RTKit registry exchange, running: 1, ordinary consumer ACKs, unchanged idle policy/thermal behavior, bit-exact H.264 and HEVC with measured (not assumed) 1080p uplift, VMAX floor 2 plus residency ACK only while AVD is active, floor 0 and residency release at idle, and complete fallback rollback with unchanged ESP/xART evidence. Then J316s/T6000 needs its own PMP startup, idle, and rollback qualification.

No macOS volume, xART, ESP, persistent boot file, local override, private lab record, or hardware register was written by this PR work.

Admit the T8112 fallback compatible, distinguish required runtime ADT identifiers from static DTS data, and allow the existing T600x PIO address/size arrays.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Enable PMP with the existing APPLE_USE_PMP consumer graph and expose running status on report providers without sensors. Keep baseline DTs disabled pending hardware qualification. Document every fallback-path input and the original transport configuration, test both board graphs and the distinct t-4501 loader profile, and execute the report-validation KUnit vectors on the host.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
T8112 AVD uses the PMP-v2 SOC-DEV-DVFS entry 0xb0, with a default floor
of 2 requesting SOC VMAX. Qualify only that entry in the update aperture.
Require a running, non-deferred PMP and acknowledged residency before
raising the floor, and withdraw the floor before residency on power-off.

Keep a locked, provider-owned whole-word shadow so changing the default
floor preserves the other request classes without reading a request entry.
Expose the host shadow, residency ACK and the T8112 SOC achieved-state
edge packet for safe runtime verification. No request-entry readback is used.

Exercise encoding, range limits, other-class preservation, stopped and
deferred PMP rejection, ACK timeout and release in arm64 KUnit emulation.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Constrain the qualified T8112 PMP device DVFS request to entry 0xb0 and
floor 2. Document whole-word ownership of the other request classes.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Attach the existing bit-10 AVD report domain beside the physical core
and request SOC VMAX through SOC-DEV-DVFS entry 0xb0. The report's physical
parent retains the existing ancestry. Runtime PM releases the performance
floor before withdrawing residency, without enabling global PMP domains.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
The report provider now writes provider-owned whole-word DVFS shadows.
Mirror those members and GENMASK_ULL in the host boundary so the extracted
write function compiles. Extract the DVFS validator when present so newer
report entry probes compile too, while retaining older source support.

Keep the graph assertions and mutation compilation/runtime checks intact.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Keep the existing physical AVD domain when APPLE_USE_PMP is absent. The opt-in profile adds the PMP report domain as the performance domain, so a stopped or disabled PMP cannot block ordinary baseline decode.

Teach the combined T6000/T8112 profile test about the T8112 core/perf graph and delete the performance-domain name in the legacy loader profile.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
@RyanTheTide RyanTheTide added hardware-gated Requires approved hardware validation before merge soc:T8112 Hardware discussions for T8112 (M2) soc:T6000 Hardware discussions for T6000 (M1 Pro) labels Nov 6, 2026

RyanTheTide commented Nov 7, 2026 •

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t-5403 software receipt refresh for Linux 8c8afadf412cb35695149c7dd4491ffeda7fe25f (replacement draft #1064) and Aura a0201cd605b8b2317868b2033f0d91c52f6f8bae (#88). Linux #1020 is superseded by #1064 and preserved for comparison; the conflicting series was rebased on a new branch without force-pushing. Aura merges cleanly and was not rebased.

Gate Controller receipt Result
arm64 QEMU PMP KUnit h-49541 rc=0, 32/32, zero skips: startup 14, T8112 DVFS 4, report 14
Integration Image + complete matching modules h-49539 rc=0, release 7.3.0-g8c8afadf412c; Clang 22.1.6, Rust 1.97.1, bindgen 0.73.2
Five baseline/PMP/legacy-loader DT profiles h-49539 5/5 PASS, regenerated at the rebased head
Aura synthetic PMP suite + bare Stage 2 h-49547 rc=0, supported EXTRA_CFLAGS=-Oz compact build; original linker boundary retained
Complete-history host registry h-49556 rc=0, 195/195 PASS; non-shallow history, 1,509,666 reachable commits, historical controls present, 195 per-job logs retained

SHA256 receipts:

  • Image: d32261c2a51b82ac629c56fca47ae19bb6b6a4fc0a72af6a50976031ea035169
  • Complete modules archive: a9925c3b8a71edcf763ddae82e17c76afb64307c65d6a2efc0367b6ee39d2352
  • Integration config: 23c3008c4fe93f2b218163633645e2ef8018338fa5fd68b719d04b4cf3f5e69e
  • Aura binary: d4bd1a4318ab74d5bf34f885fedcfd30b0856427ad1d3141a30e8782fdf62832
  • Kernel build log: 086b9b5cb9f61a7ae572eb8dfcbc150bb969f44bb6cb9e60e8c89d64e1f1b460
  • Aura build log: 890ff8ceba7ace36c482b07e4b02a21bbf1bcd4e2f98e7813caecd7b548df53e
  • Host suite summary: a27285f84fb8853249dcd2c4f0ce048f7a5668af968ce76e4d40f70fd981064d
  • All host-test logs archive: 144ff62ab24369125a51f687a4bbc0b6bd542d7f7a5d5d240b0fc90ab29d1d09
  • KUnit test log: cb661a9bda1e389598779a0fcc056cd656004c321646f1d796d3b7227cfd48df

The Aura build uses USE_CLANG=1 ARCH=aarch64-linux-gnu- RELEASE=1 CHAINLOADING=1 ESP_STAGE2=1 BUILTIN_LOGO=aurora EXTRA_CFLAGS=-Oz. Symbols prove _file_vital_end=0x11a9e8 < _file_limit=0x120000. All requested kernel/Aura/KUnit artifacts returned, and local hashes of Image, modules and Aura binary match the controller receipts.

Retained failures: h-48570 source bundle missing; h-48573 source lacked a Makefile; h-49537 synthetic suite passed but default -Os raw link hit the DCP buffer boundary; h-49540 stopped before suite execution because the source checkout had no origin URL (fixed in h-49556). The old h-48576 kernel receipt was green for the original #1020 head only. No failed/queued job is represented as a pass. Default-build base control h-49555 rc=2 reproduced the same DCP boundary failure at original Aura base 8e7c2f5631a9 with the same toolchain, proving this observed default-build problem predates the PMP patch. The compact build is a documented setting difference, not a claimed default-build pass. git diff --check and 7/7 Linux commit-trailer checks passed on the buildbox.

Latest fetched base tips integration/aurora 6ea4729159cc and Aura main dd82cf960e86 both merge cleanly with the unchanged tested heads. No force push, ready-for-review transition or merge was performed.

PWR hardware gate remains. Independently qualify M2 J413/T8112 and M1 Pro J316s/T6000 via controller-approved RAM-only one-shots with bootguard fallback and active speaker protection. Require fresh PMP startup/running/ACKs; matched baseline/candidate/post-decode idle-power measurements on both devices; M2 bit-exact H.264/HEVC with measured uplift, active floor 2/residency ACK and idle floor 0/release including unwind; 0 new boot-log warnings; and SELinux enforcing, active audit collection, 0 AVC denials. The integration receipt's config lacks SELinux: PWR must rebuild/receipt the matching enforcing configuration before AVC qualification and use that identical config on both sides of the DT comparison. Verify unchanged persistent hashes and read-only xART ledger after fallback rollback. No reference hardware was used here; both active PRs stay draft. The old kit remains incomplete/unqualified until refreshed against the new source/artifact manifest.

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hardware-gated Requires approved hardware validation before merge soc:T6000 Hardware discussions for T6000 (M1 Pro) soc:T8112 Hardware discussions for T8112 (M2)

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