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pmdomain: opt-in T6000/T8112 PMP and T8112 AVD VMAX (rebased) - #1064
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Admit the T8112 fallback compatible, distinguish required runtime ADT identifiers from static DTS data, and allow the existing T600x PIO address/size arrays. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Enable PMP with the existing APPLE_USE_PMP consumer graph and expose running status on report providers without sensors. Keep baseline DTs disabled pending hardware qualification. Document every fallback-path input and the original transport configuration, test both board graphs and the distinct t-4501 loader profile, and execute the report-validation KUnit vectors on the host. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
T8112 AVD uses the PMP-v2 SOC-DEV-DVFS entry 0xb0, with a default floor of 2 requesting SOC VMAX. Qualify only that entry in the update aperture. Require a running, non-deferred PMP and acknowledged residency before raising the floor, and withdraw the floor before residency on power-off. Keep a locked, provider-owned whole-word shadow so changing the default floor preserves the other request classes without reading a request entry. Expose the host shadow, residency ACK and the T8112 SOC achieved-state edge packet for safe runtime verification. No request-entry readback is used. Exercise encoding, range limits, other-class preservation, stopped and deferred PMP rejection, ACK timeout and release in arm64 KUnit emulation. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Constrain the qualified T8112 PMP device DVFS request to entry 0xb0 and floor 2. Document whole-word ownership of the other request classes. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Attach the existing bit-10 AVD report domain beside the physical core and request SOC VMAX through SOC-DEV-DVFS entry 0xb0. The report's physical parent retains the existing ancestry. Runtime PM releases the performance floor before withdrawing residency, without enabling global PMP domains. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
The report provider now writes provider-owned whole-word DVFS shadows. Mirror those members and GENMASK_ULL in the host boundary so the extracted write function compiles. Extract the DVFS validator when present so newer report entry probes compile too, while retaining older source support. Keep the graph assertions and mutation compilation/runtime checks intact. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Keep the existing physical AVD domain when APPLE_USE_PMP is absent. The opt-in profile adds the PMP report domain as the performance domain, so a stopped or disabled PMP cannot block ordinary baseline decode. Teach the combined T6000/T8112 profile test about the T8112 core/perf graph and delete the performance-domain name in the legacy loader profile. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
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t-5403 software receipt refresh for Linux
SHA256 receipts:
The Aura build uses Retained failures: h-48570 source bundle missing; h-48573 source lacked a Makefile; h-49537 synthetic suite passed but default Latest fetched base tips integration/aurora PWR hardware gate remains. Independently qualify M2 J413/T8112 and M1 Pro J316s/T6000 via controller-approved RAM-only one-shots with bootguard fallback and active speaker protection. Require fresh PMP startup/running/ACKs; matched baseline/candidate/post-decode idle-power measurements on both devices; M2 bit-exact H.264/HEVC with measured uplift, active floor 2/residency ACK and idle floor 0/release including unwind; 0 new boot-log warnings; and SELinux enforcing, active audit collection, 0 AVC denials. The integration receipt's config lacks SELinux: PWR must rebuild/receipt the matching enforcing configuration before AVC qualification and use that identical config on both sides of the DT comparison. Verify unchanged persistent hashes and read-only xART ledger after fallback rollback. No reference hardware was used here; both active PRs stay draft. The old kit remains incomplete/unqualified until refreshed against the new source/artifact manifest. |
Picks up the tools/aurora-sep source-check fix (c60537c) and the current release branch, so CI runs against today's base. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
M2 (J413, T8112) hardware result, 2026-11-08: the vote works, but decode gets slower. Keeping this in draft.I tested on the tethered M2 with a one-shot aura-try Stage 2 and a one-shot kernel, restoring production after each trial. Nothing was committed and Stage 1 was not touched.
What works:
What fails:
So starting the PMP drops the AVD/SoC below the state the boot firmware leaves behind, and the Next step: find which SOC-DEV-DVFS entry and level macOS raises on T8112 during AVD decode. I'm not guessing entry/level values against live PMP firmware. M1 Pro (T6000) was not tested. Idle power wasn't a matched comparison (different uptimes at sampling, battery charging), so I don't claim an idle-power result. One unrelated note: one warm reboot of the production fleet30 boot hung after journald stopped. A VDM |
Add an explicit request-class binding and place the T8112 AVD floor in bits 51:48 while retaining the legacy low-five-bit encoding when the property is absent. Report the full provider shadow and cover VMAX, VNOM, release, lane preservation and ordering in KUnit. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
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t-5739 follow-up is now in Buildbox receipts (controller-retained logs): h-50964 rc=0 full arm64 t-5740 remains the hardware gate: controller-approved RAM-only M2 J413 one-shot with bootguard fallback, require class-25 shadow only while AVD is runtime-active, SOC state toward 2 (or document an already-high state), recovery toward the AVDCAP PMP-off decode baselines with bit-exact H.264/HEVC output, clean idle/error-unwind release, and unchanged persistent hashes/read-only xART after fallback. No target hardware was used here. |
M2 (J413) hardware qualification of 4df8410 (class 0x25 AVD vote): the vote works, the cap staysSame-kernel A/B on the M2, 2026-11-09. Kernel: integration/aurora f611d92 + this branch 4df8410 (local merge; the only conflict is
Result: this PR stays draft. No M2 DT should enable PMP. The class-0x25 word on its own does not raise the AVD/SoC performance state once the PMP owns it. The next step is to find which other request or acknowledgement macOS makes before |
T8112 does not accept device DVFS constraints until the SOC achieved-state report has been published. Prime that report through its PTD update entry when it is still zero, wait for readiness, and only then send the AVD floor. Record every residency, state-prime and DVFS store in debugfs, and cover the ready, timeout, rollback and retry paths with emulated-MMIO KUnit. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
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t-5806 follow-up is in Buildbox receipts (controller-retained logs): h-51002 rc=0 full arm64 Exact M2 trial for MEDIA-AVD: refresh |
M1 Pro (J316s, T6000) first hardware rows (same kernel, aura#88 on b8, j316s rebuilt with
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| h264 1080p | hevc 1080p | h264 4K | idle system mW | decode system mW (h264 1080p) | |
|---|---|---|---|---|---|
| PMP off | 1052-1085 | 1226-1233 | 284-286 | 6394 | 7866 |
| PMP on | 1084-1098 | 1175-1203 | not reached | 5500 | 6769 |
- The PMP starts ("PMP manages fabric and DCS p-states", report running) and every frame is bit-exact. There are 0 DART faults and 0 kernel errors, SELinux is enforcing, and the AVC count is unchanged from the PMP-off boot.
- Idle power is 0.9 W lower (-14%) and decode power is 1.1 W lower. H.264 decode is equal. HEVC 1080p is 3% lower (3 passes each), which needs a longer rerun.
- The bench timeout cut the 4K and Q1 rows. The T6000 half is therefore promising but not qualified yet. This PR stays draft.
Hardware rows for d62d3eb (SOC DVFS-state prime): the prime is sent and ready, the cap stays at 64%Kernel: integration/aurora 6cf0ab0 (fleet36) + this branch d62d3eb, local merge (same M2 (J413)
M1 Pro (J316s, T6000; no AVD vote)
The 4K PMP-on rows were cut to keep the shared-machine lock near its limit. PMP-on is not at least PMP-off on every row (HEVC -2%, Q1 -5%), although idle power is 8% lower. Result: this PR stays draft and no DT enables PMP. On the M2 the "ready" condition is reached while |
The T8112 DVFS ready handshake uses range base entry 8. Entry 9 is the separate SOC achieved-state report and cannot qualify the range. Prime entry 8 when needed, retain the nonzero achieved word which admitted device constraints, and expose both the gate result and live SOC report through debugfs. Assisted-by: LLM Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
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t-5835 follow-up is in The provider now requires and retains the nonzero entry-8 achieved word before sending the first device constraint. Debugfs reports the complete residency write, optional entry-8 prime, retained entry-8 achieved word, class- Buildbox receipts (controller-retained logs): h-51025 rc=0, full arm64 Exact M2 trial for MEDIA-AVD:
No target hardware was used for this change; MEDIA-AVD owns the M2 qualification. |
M2 (J413) hardware rows for a650b81 (entry-8 ready gate): the gate passes, and the SoC state still never risesKernel: integration/aurora 5e1fc5c + this branch a650b81, merged locally (same
Raw data: |
Summary
Enable opt-in T6000/T8112 PMP boot inputs and qualify the T8112 AVD VMAX vote. Normal board DTs keep PMP disabled; J413 baseline decode keeps its physical-only domain. With
APPLE_USE_PMP, AVD uses physical core plus PMP performance domains, requests floor 2 only while active, and releases the floor before residency.This replaces conflicting #1020 without rewriting its branch. Rebased onto integration/aurora
68db611bf7e3a2010eaa87be2b4b7043e27f4019; the binding conflict preserves integrated T6020/T6030/T6031/T8122 compatibles plus T8112. Six commits are patch-identical. Candidate:8c8afadf412cb35695149c7dd4491ffeda7fe25f. Paired boot-data change: aurora-silicon/aura#88. #933 is complementary and does not supply these boot inputs.Validation
New-head buildbox receipts: h-49539 rc=0 integration Image, complete matching modules and 5/5 DT profiles; h-49541 rc=0, 32/32 arm64 QEMU PMP KUnit. Paired Aura h-49547 rc=0 synthetic suite and compact Stage 2 (supported
EXTRA_CFLAGS=-Oz, linker guard intact). h-49556 rc=0, complete-history host registry 195/195, with 1,509,666 reachable commits in a non-shallow source, historical controls present and all 195 per-job logs retained. Buildbox diff and 7/7 commit-trailer checks passed. Hashes and retained failures are in the receipt comment below.Earlier receipts apply to the original #1020 head only: h-48338 KUnit, h-48345 DT profiles and h-48576 Image/modules. Missing-source and default-build failures are preserved. The requested integration config lacks SELinux support; PWR must build/receipt an enforcing qualification config before AVC checks.
Hardware gate — do not merge
Keep this PR draft with Aura #88 until PWR independently qualifies M2 J413/T8112 and M1 Pro J316s/T6000 through controller-approved RAM-only one-shots with bootguard fallback.
Require fresh PMP/RTKit startup, running state and ordinary ACKs; M2 bit-exact H.264/HEVC decode with measured uplift, active floor-2 plus residency ACK, and idle floor-0/release including error unwind; matched before/after idle-power measurements on both devices; 0 new boot-log warnings and SELinux enforcing with 0 AVC denials; verified rollback with unchanged persistent payload hashes and read-only xART ledger. M1 Pro does not inherit the T8112 vote qualification.
Latest merge check against integration/aurora
6ea4729159ccis clean; the tested head stays unchanged, as requested. No target hardware was used for this integration refresh. The old RAM-only kit remains incomplete and unqualified and must be refreshed against these exact heads before any trial. Never stop/unbind a running PMP: recover through the unchanged fallback boot.