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PCI: apple-msi: program the MSI map of every listed port - #1124

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RyanTheTide merged 2 commits into
aurora-silicon:integration/aurorafrom
dmitzsaz:pr/apple-msi-multiport
Nov 8, 2026
Merged

RyanTheTide merged 2 commits into
aurora-silicon:integration/aurorafrom
dmitzsaz:pr/apple-msi-multiport

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@dmitzsaz

@dmitzsaz dmitzsaz commented Nov 7, 2026

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pcie-apple-msi serves one root port of a host the boot loader trained (J813 port 0). The MSI map entries of all root ports of a T8142 root complex name interrupts from one AIC range (ADT msi-vector-offset 1741, 96 vectors for the complex), and endpoint MSI data selects the entry. Two controllers for two ports of one generic ECAM host would hand out the same interrupts.

This lets one controller list the MSI map registers of several ports. It maps and enables every listed port from one allocator. A controller with one reg, as on the J813, behaves as before. The binding allows 1 to 3 reg entries.

Tested on: J704, 2026-11-07, one controller for ports 0 and 2 (32 MSIs at 0xfffff000): BCM4388 Wi-Fi (brcmfmac, firmware 23.10.1039) and Bluetooth (hci_bcm4377) on port 0, GL9755 SD reader on port 2 (SDR104 card hot-plugged at runtime, 84 MB/s read), both still working after s2idle.

Prepared with Claude Opus 5.5; tested by me on the hardware.

The MSI map entries of all root ports of an Apple PCIe root complex
name interrupts from one AIC range. Two controllers for two ports of
one host would hand out the same interrupts, so one controller lists
the MSI map registers of every port it serves.

Assisted-by: LLM
Signed-off-by: Dmitriy <noc@pimk.in>
The MSI map entries of all root ports of an Apple PCIe root complex
name interrupts from one AIC range, and endpoint MSI data selects the
entry. Map and enable every port the controller lists, so the ports of
one generic ECAM host share one allocator and never receive the same
interrupt. A controller with one port behaves as before.

Assisted-by: LLM
Signed-off-by: Dmitriy <noc@pimk.in>
@RyanTheTide

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Merge-train rows so far (MTR3, 2026-11-08). Test kernel 7.3.0-aurora-f4mtr3g = integration/aurora af6d986 + #1122 + #1123 + #1124 + #1176, built with 0 warnings. Each Mac got one silent one-shot boot. The checks were our FLEET regression suite vs the same Mac's fleet31/fleet30 rows, plus keyboard/trackpad/HID/DART/MSI error counts and gpubench, test boot vs default boot:

  • M2 (J413): PASS. No hard regressions. MTP keyboard and multi-touch present, 0 HID/MTP errors.
    • The first glmark read 3890, so I re-checked with 3 runs each: default 4614/4802/4462, test fresh boot 4253/3843/4612, and a plain-reboot control on fleet31 4636/3773/4555. The low reads are fresh-boot noise, not a regression.
    • gpubench light rows are equal.
  • Neo (J700): PASS. No hard regressions. glmark x3 2604/2700/2670 (default) vs 2634/2672/2665 (test). gpubench equal on the x3 re-check. AVD bit-exact. Keyboard and trackpad present, 0 HID errors.
  • J616s (M4 Pro): PASS. No hard regressions. glmark 6562 vs 6570. dEQP timeline semaphores 3835 pass, the same as fleet30, with 0 firmware crashes, 0 device-lost and 0 GPU faults. Keyboard and trackpad present, 0 HID/DART/PCIe errors.
  • M1 Pro (J316s): NOT RUN YET. Other lanes held it, and the swarm is handing over to a new orchestrator now.

Not merged yet: the plan was to merge after the M1 Pro row. The kit is kits/test/20261108-f4mtr3g on the S500, and the row script is work/linux/mtr3-20261108/comborow.sh (M1 Pro, TID=0).

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M1 Pro row done (the last of the four), 7.3.0-aurora-f4mtr3g = integration af6d986 + #1122 + #1123 + #1124 + #1176, one-shot vs the fleet31 default:

  • glmark 9861 vs 9848 (+0.1%), kernel errors 0, AVC 0 (enforcing), failed units 0.
  • Keyboard/trackpad input devices, hwmon fans and rtkit timeouts/errors: same as the default boot. 0 DART/PCIe/MSI errors.
  • Wi-Fi/BT reconnect, camera, 6+6 sleeps, ANE resume: same as the default.
  • gpubench A/B within noise (worst row copy.bw buf2img d4 +6.3%, one sample).
  • One new boot warning class, kauditd_printk_skb: N callbacks suppressed (audit printk rate limit, AVC 0). It is environmental. None of the four PRs touch audit, and the iommu: apple-dart: keep a T8142 DART that a live coprocessor uses #1122-PCI: apple-msi: program the MSI map of every listed port #1124 paths are gated to T8142, so they don't run on this T6000.

Rows passed on all four Macs (M2, Neo, J616s, M1 Pro). The trial merge onto integration d4d2678 is clean. Merging.

@RyanTheTide
RyanTheTide merged commit 6ab7073 into aurora-silicon:integration/aurora Nov 8, 2026
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Merged, thanks @dmitzsaz. It will ride the next fleet kernel.

RyanTheTide added a commit that referenced this pull request Nov 8, 2026
Brings #1122, #1123, #1124 (T8142 DART/MTP/MSI), #1176 (G17 fw-id fence),
#1201 (J700 speaker full scale) and the rest of integration since
11943fb into aurora-wip.

Conflicts were in four device-tree binding documents only, where
aurora-wip has the T8152 versions and integration the T8142/T8152/T6050
generalisation:
- apple,admac: keep both the lone apple,t8152-admac and the
  apple,t6050-admac/apple,t8140-admac pair.
- apple,t8152-aop: take integration (it still allows a lone
  apple,t8152-aop, one or two mailboxes).
- apple,t8152-aop-audio: take integration and keep a lone
  apple,t8152-aop-audio compatible.
- apple,dwc3: keep the T8152 host-mode rules, and require resets and
  usb-role-switch on every enabled non-T8152 controller.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
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