Skip to content

drm/asahi: g17: Run the M5 Pro on bare metal - #1425

Merged
DjDeveloperr merged 1 commit into
funkzy/t6050-gpu-on-integrationfrom
dj/g17-m5-pro-bare-metal
Nov 10, 2026
Merged

DjDeveloperr merged 1 commit into
funkzy/t6050-gpu-on-integrationfrom
dj/g17-m5-pro-bare-metal

Conversation

@DjDeveloperr

@DjDeveloperr DjDeveloperr commented Nov 10, 2026 •

Copy link
Copy Markdown
Contributor

What this fixes

On #1012's head the M5 Pro (J714s) still has the profile without bare-metal tables. The GPU probe refuses it ("M5 Pro bare-metal GPU tables not yet available"), so there is no render node, and the M5 Pro desktop, which renders through zink on the GPU, can't start.

The change

One commit, in drivers/gpu/drm/asahi only. It gives the M5 Pro the M5 Max's bare-metal profile, with each value checked against the J714s 27.0 ADT and the firmware iBoot loads:

  • Page-table roots: both roles publish their kernel roots; the secondary's is 0x40000 above the primary's.
  • Crash logs: go in each role's shared-RO data, inside fw-data.
  • UAT policy: the Max and Ultra's.
  • Firmware: only the G17S 26A428 build is admitted. Its digest is the one two J714s boots measured.
  • Cleanup: the unused profile and its probe refusal are removed. The firmware identity test covers the M5 Pro's image.

On integration/aurora (as merged in #1406), variant::Build has a config field. This build entry then takes config: None, as #1406 does for the Max and Ultra builds.

Testing (M5 Pro, J714s)

🤖 Generated with Claude Code

The M5 Pro (J714s) is the last M5 board probe refused ("M5 Pro bare-metal
GPU tables not yet available"): its configuration named no firmware and
kept the profile without bare-metal tables.

Give it the M5 Max's bare-metal profile, with each value checked against
the J714s 27.0 ADT and the firmware iBoot loads:

- Both roles publish their kernel roots. The boot arguments iBoot writes
  into each role's TEXT put the primary's tables at the ADT
  gfx-shared-region (BPTP 0x10ffff28000, the `pagetables` region) and the
  secondary's 0x40000 above it (BPTP 0x10ffff68000), each 0x40000 long
  (SPTP), so the secondary root is at 0x40000.
- Each role places its own buffers, and its crash log is in its
  __DATA_SHARED_RO, inside `fw-data` (crash logs in fw-data). The
  data segments have the M5 Max's layout: DATA 0xc0000 and 0xb4000, each
  followed by 0x8000 of shared RO, 0x184000 in all.
- The M5 Max and Ultra's UAT policy.
- Admit only the G17S 26A428 build of both roles: TEXT 0x50000 then
  0x54000 back to back, the entropy records and boot-filled ranges at the
  Max's offsets. The digest is the one two J714s boots measured, and the
  driver's own digest code admits both boots' TEXT with it.

No board uses the no-bare-metal-tables profile any more, so it goes, with
its probe refusal. The firmware identity test covers the M5 Pro's image
too.

On the J714s booting from its SSD with this change (integration/aurora with #1012,
2026-11-10), the GPU binds with the 26A428 G17S build identified and the Hyprland
desktop runs on it through zink.

Signed-off-by: Diljit Singh <hey@djdev.me>
@DjDeveloperr
DjDeveloperr changed the base branch from funkzy/t6050-gpu-on-integration to dj/g17-m5-visible-completion November 10, 2026 09:10
@DjDeveloperr
DjDeveloperr force-pushed the dj/g17-m5-pro-bare-metal branch from 74fc9b7 to 2e6b2d9 Compare November 10, 2026 09:10
@DjDeveloperr
DjDeveloperr changed the base branch from dj/g17-m5-visible-completion to funkzy/t6050-gpu-on-integration November 10, 2026 10:21
@DjDeveloperr
DjDeveloperr merged commit 3d5a09b into funkzy/t6050-gpu-on-integration Nov 10, 2026
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant