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arm64: dts: apple: t6050-j714s: Describe the two USB-C ports - #1430
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From the J714sAP ADT: hpm0 (nub-spmi-a0 0x0c, left-back) is the debug port; hpm1 (nub-spmi-a0 0x0a, left-front) sits behind ATC1 / usb-drd1; hpm2 (nub-spmi-a1 0x0c, right) behind ATC2 / usb-drd2; hpm5 (0x08) is MagSafe. There is no usb-drd3 and no nub-spmi-a2. Describe the left-front and right ports as t6050-j716s.dts does: each SN201202x with its connector graph into its dwc3 (USB2) and combo PHY (SuperSpeed), and ATC2's PHY, mailbox, controller, DARTs and power states enabled. The inventory's nub-spmi-a1 carries the generation 4 bus's three register windows and IRQ (ADT nub-spmi-a1); the driver polls the bus and refuses an interrupt, so it takes the first window only, as J716s's node does. ATC3's USB chain and nub-spmi-a2 are turned off: the board has neither. The M5 Pro's default SSD boot has run these nodes from its DT overlay since 2026-11-09: Type-C port0 and port1 with a partner, two dwc3 controllers bound. Signed-off-by: Diljit Singh <hey@djdev.me>
This was referenced Nov 10, 2026
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The change
From the J714sAP ADT: hpm0 (nub-spmi-a0 0x0c, left-back) is the debug
port; hpm1 (nub-spmi-a0 0x0a, left-front) sits behind ATC1 / usb-drd1;
hpm2 (nub-spmi-a1 0x0c, right) behind ATC2 / usb-drd2; hpm5 (0x08) is
MagSafe. There is no usb-drd3 and no nub-spmi-a2.
Describe the left-front and right ports as t6050-j716s.dts does: each
SN201202x with its connector graph into its dwc3 (USB2) and combo PHY
(SuperSpeed), and ATC2's PHY, mailbox, controller, DARTs and power states
enabled. The inventory's nub-spmi-a1 carries the generation 4 bus's three
register windows and IRQ (ADT nub-spmi-a1); the driver polls the bus and
refuses an interrupt, so it takes the first window only, as J716s's node
does. ATC3's USB chain and nub-spmi-a2 are turned off: the board has
neither.
The M5 Pro's default SSD boot has run these nodes from its DT overlay
since 2026-11-09: Type-C port0 and port1 with a partner, two dwc3
controllers bound.
Testing (M5 Pro, J714s)
7.3.0-m5-argb2) has run these exact nodes since 2026-11-09, from its kit and integration DT overlays.apple,leakage-calibration-words, which are the unit's own fuse values;t8112cpufreq fallback compatible.t6050-j714s.dtbbuilds with no dtc warnings. dtbs_check results follow in a comment.The series edits
t6050-j714s.dtsat separate places, so its integration/aurora PRs merge in any order.Series
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