Pinned Loading
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sar-pam-balancing-robot
sar-pam-balancing-robot PublicSaR-PaM is an ESP32-based self-balancing two-wheel robot using an MPU6050 and PID control, built on a dual-core FreeRTOS architecture for stable real-time balancing. It features command-based path …
C++ 1
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8bit-processor-core
8bit-processor-core PublicSynthesizable 8-bit RISC-style processor core in VHDL with 16-bit instructions, a 16x8-bit register file, 8-state FSM, and ModelSim tests.
VHDL
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l1-cache-controller
l1-cache-controller PublicParameterized 2-Way Set-Associative L1 Cache Controller written in Verilog with 1-cycle hits, write-back dirty handling, and ModelSim testbench.
Verilog
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image-convolution
image-convolution PublicA modular VHDL image convolution system with ALU (direct) and MMU (im2col) processing units supporting multiple kernels.
VHDL
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jakarta-uhi-spatiotemporal-modeling
jakarta-uhi-spatiotemporal-modeling PublicMapping and predicting Land Surface Temperature in Jakarta using Landsat data and Random Forest.
Jupyter Notebook
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tiny-bdd-cec
tiny-bdd-cec PublicROBDD-based Combinational Equivalence Checking (CEC) engine for synthesized netlists in C++20.
C++ 1
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