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[None][feat] MiniMax-M3 NVFP4 low latency decode megakernel for Rubin (sm_107) TP2 / TP4 / TP8 in modeling_v2 - #20623

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peihu-nv wants to merge 54 commits into

NVIDIA:mainfrom

peihu-nv:peihengh/m3-vr-sm107-decode

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[None][feat] MiniMax-M3 NVFP4 low latency decode megakernel for Rubin (sm_107) TP2 / TP4 / TP8 in modeling_v2#20623
peihu-nv wants to merge 54 commits into
NVIDIA:mainfrom
peihu-nv:peihengh/m3-vr-sm107-decode

Commits on Oct 15, 2026
Commits on Oct 19, 2026
Commits on Oct 20, 2026
Commits on Oct 21, 2026
Commits on Oct 22, 2026
Commits on Oct 26, 2026
Commits on Oct 27, 2026
Commits on Oct 28, 2026
- [None][fix] Merge main and repair M3 CI test coverage
  peihu-nv
  committed
  ee47965
- [None][fix] Merge main fixes and register Rubin kernel tests
  peihu-nv
  committed
  4b9e86c
- [None][fix] Use decoder callback for M3 graph headroom
  peihu-nv
  committed
  5f4c412
- [None][fix] Merge main preserving M3 and Kimi registrations
  peihu-nv
  committed
  6505d7f
- [None][fix] Merge refreshed M3 and main into Rubin target
  peihu-nv
  committed
  58cf669
- [None][fix] Remove duplicate M3 CPU test registration
  peihu-nv
  committed
  890400f
- [None][fix] Isolate M3 fake registrations from stock imports
  peihu-nv
  committed
  7362f43
- [None][fix] Isolate M3 fake registrations from stock imports
  peihu-nv
  committed
  54da95b
- [None][fix] Merge M3 prerequisite import isolation fixes
  peihu-nv
  committed
  83115a9
- [None][fix] Require compiled Rubin target operators
  peihu-nv
  committed
  0b1a818
- [None][fix] Keep shared M3 fake ops in the kernel package
  peihu-nv
  committed
  2b23cdc
- [None][fix] Keep shared M3 fake ops in the kernel package
  peihu-nv
  committed
  53d48ee
- [None][fix] Merge M3 shared fake-op layout prerequisite
  peihu-nv
  committed
  54d4bc1
Commits on Oct 29, 2026