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drm/apple: Enable T6050 USB4 DisplayPort tunnels and paired shutdown - #1270
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DjDeveloperr
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Tested on the M5 Pro: the internal panel runs through the reworked fabric/DCP code (eDP-1 3024x1890, connected and enabled), and the GPU and display stack come up as before. External tunnels weren't exercised (no display attached). The new and touched suites pass: apple-dcp-topology, apple-dcp-fabric (48/48), apple-dcp-external-announce/ready/relink/resume, apple-dcp-announce, apple-iomfb-mode-state.
Setup. 14-inch M5 Pro (J714sAP, T6050, macOS 27.0 firmware). RAM boot through aura of #1273's head (the whole stack on ewb/j716c-usb4-public-base), plus our M5 Pro GPU commit, plus #1308. #1308 is needed because the base doesn't build t6050-j714s.dtb; see there. The kit DT is the J714s one compiled on this tree. Modules: nvme, display, smc, input, gpu and usb4 (mux-apple-display-crossbar, phy-apple-dptx, atc-t6050-dp, dwc3-apple, sn201202x, thunderbolt, thunderbolt_apple). No display or dock was attached. ATC0 carries the debug link.
Whole-stack result on J714s.
- Boots to a shell with no oops, WARN or BUG.
2ab000000.phyand383000000.phy-> apple-t6050-dp-phy (phys .0-.5);2aa280000.usband382280000.usb-> dwc3-apple. typec port0 and port1 register (device/sink, no partner). The debug port is left alone and the KIS link stayed up throughout.- Internal panel:
display-subsystem-> apple-drm,card1-eDP-1connected and enabled at 3024x1890. GPU: card0 and renderD128. - ATC2 router mailbox
381108000binds and thunderbolt_apple loads.381ac0000.aciostays deferred because J714s has no boardports/DROM yet.
KUnit on the same tree (ARM64 QEMU, panic_on_warn=1, PROVE_LOCKING, DEBUG_OBJECTS_WORK): 356 tests, 354 passed, 2 skipped by design.
Route four DP IN adapters through the T6050 display fabric, assign each dock stream its own processor, and manage the PHY clocks and crossbar link around activation. Handle firmware-27 tunnel attributes, resource calls, drive settings, HPD events and paired high-bandwidth modes. Stop a firmware-27 display pair before the single-pipe profile guard so DPMS and cable removal release its route. Bind deferred HPD events to their attachment and drain delivery before route retirement or reassignment. Describe T6050 four-adapter tunnel routing in the display binding. Developed with Claude Code. Signed-off-by: Erik Bourget <erik@ebourget.net>
T6050 assigns each display tunnel to a processor before userspace can modeset it. Narrowing possible_crtcs to that processor after registration changes advertised encoder capabilities and breaks clients that cache them, especially when reconnecting a dock changes tunnel allocation. Expose one connector for each eligible physical port and display processor pair, with a single fixed CRTC mask. Publish each attachment on the connector for its assigned processor, independently of the DP IN ordinal. Keep the tunnel slot for ownership tracking, adopt already active routes during DRM initialization, and clear route references during DRM unbind. Leave the existing topology on earlier platforms unchanged. Exercise connector identity across all ports and DP IN ordinals, reversed boot ownership, retirement and unbind with KUnit coverage. Developed with Claude Code. Signed-off-by: Erik Bourget <erik@ebourget.net>
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Leaving this open: it is based on #1012 ( 🤖 Generated with Claude Code |
…Q_HPD A sink behind a Thunderbolt DP tunnel can raise IRQ_HPD after its stream was disturbed, for instance when the port's other tunnel stops. The request is passed to the firmware, which may answer by dropping the sink. The tunnel and its HPD are still there, so nothing connects the sink again and the display stays dark until the cable is replugged. Count a delivered IRQ_HPD as a link coming up, and let T6050 tunnel outputs that still have HPD take the existing relink: a drop within the relink window replays an unplug and a replug, at most three times per attachment or DPMS wake. Other tunnels are unchanged. On J716c with two displays on a dock, switching one off dropped the other in three of eight tries; each one now comes back by itself. Developed with Claude Code. Signed-off-by: Erik Bourget <erik@ebourget.net>
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RyanTheTide
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One change in drivers/gpu/drm/apple/dptxep.c reaches firmware other than 27. The new DPTX_APCALL_SET_RESOURCE_AVAILABLE case in dptxport_call() is commented "Firmware 27 reports...", but it runs for every firmware. Before this patch, call 25 on an DCP_IOMFB_METHODS_H17P_EXTERNAL pipe took the default: branch and returned -EOPNOTSUPP. Now it is acked. Please gate the case on fw_compat == DCP_FIRMWARE_V_27_0 (and let other firmware fall through to default: as before), or say in the commit why acking call 25 is right for H17P external pipes too.
The other changes outside the firmware-27 files are behind apple,t6050-dcpext, dptx_tunnel or DCP_FIRMWARE_V_27_0. One exception is the GET_VIRTUAL_DEVICE_MODE move into dptxport_call(), which gives the same reply on the v2 and compact paths as before.
The T6050 USB4 DisplayPort tunnel merges (aurora-silicon#1268, aurora-silicon#1270, aurora-silicon#1271) gave the display fabric up to four DP IN adapters per port (DCP_FABRIC_DPIN_MAX, dcp_fabric_dpin_slot()), a per-DP IN tunnel clock on T6050, firmware 27 pipelines that never take a tile, and apple_dp_tunnel_routes_port() to find a connector's display routes off port 3. The extracted production bodies no longer built against these fixtures, and tunnel-route read past its two-entry dpin[] array. Model the new code rather than stubbing it out: - t6030-clock: the route records its tunnel_rate; the T6050 PHY clock call is a recording stub that only a T6050 machine may reach. A new case checks DP IN n runs tunnel clock n + 1 and that the route keeps its rate only when the clock started. - t6030-wiring: extract apple_dp_tunnel_routes_port() as production (the extractor now keeps a return type on its own line) and take DCP_FABRIC_DPIN_MAX from the header. New cases: routes on port 2 beside a USB4 router on port 3, four named DP INs on a five-output crossbar, DP IN 2/3 on a three-output crossbar, and DP IN 2/3 without a DP IN 0/1 pair. - tunnel-route: dpin[] and the crossbar are sized from the header. DP IN 2/3 on a three-output crossbar and DP IN 4 stay refused; new checks cover four- and five-output crossbars, named and legacy. - tiled-split: extract dcp_fabric_dpin_slot() and enum dcp_firmware_version. The readiness-judged, any-external-untileable and dcpext-tileable mutants match the new untileable condition with the same meaning. New firmware 27 cases (DP IN 1 alone, with a tile hint, DP IN 3 in DP IN 1's slot) and mutants (fw27-tileable, dpin3-primary-slot). No existing case changed its expected result, and no driver change was needed: every failure was a stale fixture. Signed-off-by: Diljit Singh <hey@djdev.me>
Enable T6050 USB4 DisplayPort tunneling across four DP IN adapters, assign dock streams to display processors, manage tunnel clocks and crossbar links, and handle paired display shutdown. Bind deferred HPD events to their attachment and drain delivery before route retirement.
Expose one connector per eligible Type-C port/display-processor pair with a permanent CRTC mask. Publish each attachment on its assigned processor's connector independently of tunnel ordinal, so compositors can cache encoder capabilities across hotplug.
Based directly on #1012 (
funkzy/t6050-gpu-on-integration) for the GPU and firmware-27 display implementation. Additional dependencies: #1268 supplies the tunnel-clock API and PHY implementation (and brings #1323 transitively); #940 supplies the T6050 DPTX PHY sequence for runtime display operation. These are explicit cross-PR dependencies, not commits copied into this branch. Apply them together for builds and device testing.This PR contains the tunnel feature, the stable-connector policy and tunnel relink. A display behind a tunnel whose firmware drops it after servicing its IRQ_HPD, while the tunnel still reports it present, is connected again (at most three times per attachment or DPMS wake). The fixed-rate timestamp workaround that was here is gone: #1404 sends firmware-27 swap timestamps in the firmware's timebase instead. The shared PHY declaration belongs to #1268.
Validation: the combined dependency tree builds Image.gz, modules and all 137 Apple DTBs, including all 11 T6050 boards. ARM64 QEMU passes 245 display KUnit tests with one existing skip, with debug mutex/work-object checks and panic_on_warn=1. All 20 affected binding documents and focused source/modeled-handoff DT checks pass; the three-port resource check and 30 reciprocal graph edges pass. Full-registry schema validation retains the documented unrelated tunable-type collision.
Hardware validation: the final combined source tree booted on J716c with clean upstream Aquamarine. The internal panel runs at 3456×2234@120 Hz, and the two external monitors were captured at 3840×2160@240 and @120 Hz. The user tested the TS5 on all three physical ports and confirmed both displays, USB input and Ethernet working. With #1268's tunnel clock changes and #1404: the internal panel completes 119.5 swaps per second at 120 Hz; with two 4K displays on the dock, switching one off and on left the other undisturbed in 8 of 8 cycles and in a power-button test. Before the relink, a display dropped after its IRQ_HPD stayed dark until a replug; with it, 3 of 3 such drops came back by themselves.
The hardware image also combines the public platform PRs #936, #938, #941, #942 and #943 for storage, networking, SMC and related platform support. These are boot-test inputs, not extra ancestors of this feature branch. The combined test tree remains local and is not a PR base.
Created with GPT-6 Astra in Codex and Claude Fable 5.2 in T3 Code.