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Merge integration/aurora into the M5 GPU branch, with what it needs to build - #1406
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DjDeveloperr merged 666 commits intoNov 10, 2026
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DjDeveloperr merged 666 commits into
DjDeveloperr merged 666 commits into
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A DCP that powers its display domains down while the display is off clears its pipe's PMC interface enables first and restores them after powering the domains up. Add apple,pmc-interface, a phandle to the pipe's apple,consumer-switched PMC interface node. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Signed-off-by: Bartosz Nitka <niteria@gmail.com>
Describe what a power-down of the internal display domains needs on T8132: - the PMGR register block up to the display CPU's power-gate retention registers at 0x2504c and 0x25070; - the PS_PROT bank of clock protection slices, as a syscon; - the internal display pipe's PMC interface enables (BWR and boost bit 0), as a consumer-switched interface, since its power states are firmware-owned rather than a power domain. No consumer uses them yet. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Signed-off-by: Bartosz Nitka <niteria@gmail.com>
The boot loader finds the SEP by the path a board's sep alias gives. The inventory puts it in the unit-less soc node, and "/soc" names soc@200000000 first, so such a path never reaches it, and the loader could not reserve the SEP firmware or add its manifests. Move the SEP, its mailbox and its DART into die 0's soc node, whose ranges cover them. Signed-off-by: Diljit Singh <hey@djdev.me>
The boot loader finds the SEP through the sep alias: it reserves the SEP firmware (ADT memory-map SEPFW) and adds the iBoot and local policy manifests the enclave needs to open the machine's secure storage. Without them apple_sep refuses to attach. J616s has the same alias. Signed-off-by: Diljit Singh <hey@djdev.me>
The T6050 PMP DART's window starts at 1 TiB and spans 64 GiB (ADT dart-pmp0 vm-base and vm-size), as T8142's does, so the firmware gets a 42-bit DMA mask. iBoot loads the firmware without starting it; the driver starts it as on the other SoCs. Unlike T8142's, this firmware never readies endpoint 7 (CoreAnalytics): waiting for it fails the probe with -ETIME, so it isn't started. Tested on J714s (M5 Pro) with the PMP described as in the following commit and enabled, board-id, DRAM vendor, PMC boot arguments and the ADT's iop-pmp0-nub properties as tunables: "PMP firmware and endpoint ready" 1.6 ms after RTKit init, and a PMC gated on it binds. With endpoint 7 started the probe failed with -62. Signed-off-by: Diljit Singh <hey@djdev.me>
The PMP driver maps the firmware's SRAM as "pmp" (ADT pmp0 reg[2]) and the ASC as "asc" (reg[0]), talks through the ASC mailbox at +0x8000 and allocates through its DART, whose window starts at 1 TiB and spans 64 GiB (ADT dart-pmp0 vm-base, vm-size). Describe them that way; the mailbox interrupts are the ADT's four in ascending order, as for the other T6050 ASC mailboxes. Everything stays disabled: a board enables the PMP once it supplies the boot arguments and firmware properties. Signed-off-by: Diljit Singh <hey@djdev.me>
…down Let the internal DCP power its display down while blanked (appledrm.power_gate_ms): - the display CPU, frontend and system power states are consumer-switched, the CPU with the retention workaround macOS sets while it is off (0x3 in 0x2504c, 0x0 in 0x25070); - the DCP firmware DART and the display frontend DART name their clock protection slices, 42 and 8, as the ADT does; - the DCP names the internal pipe's PMC interface. The power states are in the policy the J715 shares, where nothing uses them yet: only the J713 names the PMC interface, and the J715 is untested. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Signed-off-by: Bartosz Nitka <niteria@gmail.com>
The internal PCIe controller on T6040 and T8112 needs two power domain chains to stay on while its links are up. Allow up to two entries. Assisted-by: LLM Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Add a mutex-serialized sequencing core with ordered rail, port, config and endpoint operations, bounded retries, conservative failure cleanup and deferred helper events. Keep the live reader always powered until an independent insertion wake source and config-access exclusion can be supplied by a complete platform adapter. Build the core only with its KUnit suite. Cover transitions, ordering, partial failures, media races, concurrent events and suspend/resume with mocks, and document adapter requirements and hardware qualification. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Preserve the original CCMP selection commit while preparing the vendor- specific SAE fix on the current integration base. Signed-off-by: Michal S. <michal_stopyra@icloud.com> Assisted-By: LLM
Clearing wpaie in the common SAE path discards userspace cipher constraints. On BCM4388, WCC firmware then constructs a GCMP-256 association RSNE for a CCMP-only request, which supplicant rejects with reason 19. Retaining the requested RSNE produces a CCMP SAE connection, and firmware still appends its PMKID. Keep CYW station/client RSNE clearing in its firmware vendor callback. Leave AP password setup unchanged and propagate clearing failures. Cover the production CONNECT offload stage and WCC/CYW callbacks with 13 host controls and an original-code negative control. Hardware validation is limited to J614s. Signed-off-by: Michal S. <michal_stopyra@icloud.com> Assisted-By: LLM
On BCM4388, fixed channel-directed join dwell and probe budgets can stall association with AWDL enabled. Use documented firmware defaults when an AWDL interface shares the radio, preserving channel and BSSID hints and the existing budget without AWDL. Keep AWDL configuration and lifecycle intact. Test both join formats and register an original-code negative control. J614s boot, reconnect and subsequent AirDrop transfer passed; quick firmware join failures requiring automatic retries remain unresolved. Signed-off-by: Michal S. <michal_stopyra@icloud.com> Assisted-By: LLM
MMC requires HAS_IOMEM. Enable UML I/O emulation in the test configuration so that the mock suite can be selected by the UML KUnit runner. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
thunderbolt: unregister XDomains when the domain is removed
The T6050 clusters' DVFS command register reads back the last request it accepted, not a measured state, so the profile verifies each transition against that readback, with a 2 ms timeout. On this chip the firmware owns the clusters' thermal limits; the profile refuses a cluster whose node doesn't say so (apple,firmware-managed-thermal), and the binding requires that property for apple,t6050-cluster-cpufreq. Tested on J714s (M5 Pro, bare metal under aura Stage 2): all three clusters bind (M 300-4380 MHz, P 300-4608 MHz, schedutil) with no DVFS error; idle clusters sit at 300 MHz and loaded ones at their top state. Clocks measured with a dependent add chain go from iBoot's 2.65/1.34/ 1.31 GHz to 4.29/4.38/4.60 GHz (with WFI idle); one-thread work is 1.6x faster on M and 3.4x on P, and idle system power drops from 20.1 to 7.2-7.9 W while idle still spins under idle=nop. Carried for the bare-metal kit by Erik Bourget (#944). Signed-off-by: Diljit Singh <hey@djdev.me>
macOS lists every SEP endpoint as its own service (sep-endpoint,cntl, sep-endpoint,sks, ...), but diag only had a count, and the names were only in two info lines per endpoint in the kernel log: 24 lines on every boot, gone again once the ring wrapped. Several states had no report at all: where the OS identity for the xART exchange came from, whether the hwrng survey registered, how long the bring-up took, and the xART requests the driver failed, which did not log. Add, keeping every existing attribute and value as it was: - endpoint_names: the advertised endpoints by their four-character names, in endpoint order; - attach_ms, ready_ms: milliseconds from probe to the attach decision and to the end of the boot-time bring-up; - os_identity: explicit, chosen or unavailable; - hwrng: pending, registered or failed; - xarm_failures: every xART request answered with the failure status, the guard's refusals included; the first is now logged; - unhandled_messages: messages on endpoints without a handler, logged only the first few times; - sleep, sleeps: held between the PM prepare and post events, and the number of completed sleep cycles. The per-message discovery trace moves to debug level, and one line replaces it at the end of the bring-up: ready in 4106 ms: 12 endpoints (cntl sbio scrd sse hdcp xars sks xarm hibe pnon skdl stac), key store open The attributes are only added, so the diag ABI stays at 2. Each read still only loads cached words and sends nothing to the SEP. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
The J614/J616 boot NOR has no vcc-supply, so spi-nor falls back to a dummy regulator and warns on every boot: spi-nor spi0.0: supply vcc not found, using dummy regulator The flash runs from a PMU rail that is on whenever the SoC is and that no OS switches; the ADT gives the flash no supply. Describe it as an always-on fixed regulator, as the T8140 J700 and the M1/M2 boards do. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
enable_irq_wake() on an Apple GPIO interrupt fails with -ENXIO: the irqchip has neither an irq_set_wake callback nor IRQCHIP_SKIP_SET_WAKE. A driver therefore cannot arm a GPIO-routed device, such as the SPI keyboard and trackpad on t8103/t600x laptops, as a wakeup source. The per-group interrupts are chained handlers on the AIC. suspend_device_irqs() leaves chained interrupts enabled, and the AIC already skips set_wake, so nothing needs programming. The pin interrupt only has to be marked as wakeup-armed so the PM core keeps it live in suspend-to-idle and treats it as a wakeup event. Set IRQCHIP_SKIP_SET_WAKE. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
The wakeup path was compiled out behind an IRQ_WAKE_SUPPORT define that nothing sets, so the controller was always powered off in suspend and the built-in keyboard and trackpad of the SPI HID laptops could not wake the system. Only the lid and the power button could. Make the device wakeup-capable, enabled by default like a USB keyboard. In suspend, a wakeup device keeps the controller powered and arms its interrupt, and resume only re-enables the interrupt because the controller kept its state. When wakeup is disabled through power/wakeup, or arming fails, the controller is powered off as before and rebooted on resume. A failed arm no longer leaves the controller powered with no wake armed. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
The enclave sends a lock-state notification after each query, so the same state for the same user reached the log at info level ten to forty times a boot (38 lines on a J316s boot with two users). Keep the line for a change of state or user; a repeat of the last notification is logged at debug level. The state itself is recorded as before. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Users and the test suites had no single place to see whether the SEP came up as it should. The answer was spread over seventeen diag attributes, the device nodes, the hwrng and the kernel log, and only aurora-sep-ready looked at part of it, for Touch ID. aurora-sep status checks each state the driver reports and prints PASS, WARN, FAIL or INFO with the value and what it means: attach, the endpoints by name against the twelve every supported SEP advertises (the set macOS lists), bring-up time, key store, keybag, xART, OS identity and the MacBook Neo's os_uuid pin, hwrng, Touch ID, sensor, restore, matching, xART guard refusals, failed xART requests, unhandled messages, sleep, aurora-sep-ready.service, and the apple_sep error and warning lines of the boot. It exits 1 if a check failed and 2 without a SEP. --json and --summary are for test suites. It only reads, and never opens /dev/sep-bio, which would activate Touch ID. As root it reads 32 bytes from /dev/hwrng when the enclave is the current hwrng, which shows the enclave still answers, after a resume too. On kernels without the newer attributes it checks what they have. Installed as /usr/bin/aurora-sep by the Fedora and Arch packages. The tests run it against a synthetic sysfs, one broken state at a time. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
A Touch ID capture that ends without a frame means nobody touched the sensor before the capture window closed. Verify answers with a retry and PLACE guidance and enrol counts it as no finger; neither is a driver or hardware problem. Every PAM prompt that times out or is answered with the password logged a kernel warning, so the warning count of a normal session grew with each unused prompt. Log both at info level. Sensor faults during a capture stay errors. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
… unit type A -millicelsius property already has its type from the dtschema unit suffixes (an int32 array). Describe it as a single value instead of redefining the type, which made every user fail validation. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
The M1 Pro and M1 Max MacBook Pros exposed no GPU temperature. Their SMC has four GPU keys: Tg04 and Tg0C, and Tg05 and Tg0D, which read Tg04 and Tg0C plus a fixed 9.2 C. Measured on a J316s (M1 Pro): 33.9-44.3 C during a glmark2 run. Like the M4 Pro, the SMC publishes them only while the GPU is powered. With the GPU off at idle, Tg04/Tg0C read 0 C and Tg05/Tg0D 9.2 C. Mark those placeholders as no data: below 10 C on Tg04/Tg0C, and below 15 C on the offset keys, whose real readings sit 9.2 C above the base keys. They are read-only hwmon channels with no thermal zone or trip. Keys a machine lacks are skipped. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
The J700 exposed no GPU temperature. Its SMC has eight GPU keys (Tg04, Tg05, Tg0C, Tg0D, Tg0K, Tg0L, Tg0d, Tg0e): 57-67 C on a J700 during a glmark2 run. As on the M4 Pro, the SMC publishes them only while the GPU is powered; with the GPU off at idle they read placeholders between -4.0 and 0.2 C. Mark readings below 10 C as no data. They are read-only hwmon channels with no thermal zone or trip, added after the existing temperature nodes so the channel numbers the thermal zones use do not move. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
tbnet_handle_packet() is the ThunderboltIP protocol handler. It is called from tb_xdomain_handle_request(), i.e. from the control channel Rx ring callback. For a login request it sends the response and then takes connection_lock to update the login state. tbnet_connected_work() holds connection_lock for the whole connection setup, including tb_xdomain_enable_paths(). Programming the DMA paths reads and writes the host router config space through the same control channel. When the remote host sends a second login request while we are connecting, which happens whenever both ends start logging in at the same time (for example after "ip link set thunderbolt0 down/up" on the remote end), the handler blocks on connection_lock, the control channel Rx ring stops making progress and the HOPS read in tb_path_activate() times out: thunderbolt-net 0-1.0 thunderbolt0: login successful, enabling paths ... activating DMA RX path from 0:1 to 0:7 thunderbolt-net 0-1.0 thunderbolt0: remote login request received thunderbolt-net 0-1.0 thunderbolt0: remote login response sent ... 0: timeout reading config space 0 from 0x10 ... 0: timeout reading config space 0 from 0x10 ... DMA RX path activation failed: -110 thunderbolt-net 0-1.0 thunderbolt0: failed to enable DMA paths On an Apple M4 Pro (T6040) host connected to an M2 this happened in 7 of 17 remote down/up cycles; the host router never answered a config read again until the link was reset, so the network did not come back. Every failing cycle had a second login request arriving within microseconds of the RX path activation, none of the passing ones did. Record the request under a spinlock in the handler and answer it from a worker instead. The worker takes connection_lock, so the response is also no longer transmitted on the control channel in the middle of the path setup. A newer request replaces one that has not been answered yet. The Rx HopID is only updated while the rings are stopped, since the one in use is released at teardown. Assisted-by: LLM Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
When tb_xdomain_enable_paths() fails, tbnet_connected_work() stops the rings and clears login_sent, and nothing else happens. If the remote end got its own paths up it keeps its carrier on and does not send another login request, so the link stays down until one of the ends is restarted. Queue a new login after TBNET_LOGIN_DELAY when connecting fails, up to three times per login round, so that a transient failure recovers on its own. A successful connection and start_login() reset the count. stop_login() cancels the login work a second time after the connect work is gone, since a failing connect attempt can queue it again. Assisted-by: LLM Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
The host tests g17-t6041-initdata-tests and t6040-calibration-tests compile fw/initdata.rs and v25g83.rs on their own, without crate::hw, so naming hw::t8140::dynamic::TIMESTAMP_WINDOW in HwData::init broke both. Write the base as a literal again, and assert in hw/t8140.rs that TIMESTAMP_WINDOW still starts there, so the two cannot drift apart. Signed-off-by: Jonathan Goyvaerts <jonathan.goyvaerts@gmail.com> Assisted-by: LLM
…write Destination::write_window() waits up to 40 x 5 us for the firmware's fragment end stamp before the host writes it. The stamp has always landed by the first read, but if the firmware ever stops writing through the window (the mapping refused, another firmware), every render with a fragment end stamp would pay the full 200 us in retirement. After 8 host fallbacks in a row, hand no render a window address again; its stamps then go the host path with no wait. A stamp the firmware writes resets the count. Signed-off-by: Jonathan Goyvaerts <jonathan.goyvaerts@gmail.com> Assisted-by: LLM
When the peer on the USB4 port drops the link but the cable stays attached, the ACIO firmware puts the port group into its dead end state and waits for the host to power the block off: ... lane_init.c:1110: SBX disconnected! ... port_group.c:1528: Port Group - entering Dead End state thunderbolt-apple-nhi 381f00000.nhi: 0:1: xdomain unplugged ... port_group.c:1511: ACIO was not powered off after 2 seconds in Dead-End state ... (repeated every 2 s) A peer that reboots or powers off is reported by the Type-C controller as a cable change about 0.5 s later, which stops and restarts the ACIO, so the port recovers. When no cable change follows, for example when the peer resets its own port right after the lanes were bonded, nothing restarts it and the port stays down until a reboot. This was seen on an M4 Pro (T6040) connected to an M2 in 1 of 17 M2 reboots: the link came up while the M2 was booting, the M2 reset its port 0.5 s after bonding, and the M4 Pro port never trained again. Add a link_lost hook to struct tb_nhi_ops that the software connection manager calls when the router or host on a host router lane adapter is unplugged. The Apple NHI arms a 3 s check. If the cable is still attached, the port was not restarted meanwhile and no peer came back, it asks CD321x to revalidate the cable with a failed connection check, which cycles the ACIO and the PHY. Do this at most three times until a peer is found again. Assisted-by: LLM Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Add the shared SMC fan, power, voltage and current channels and the temperature discovery t6050-die0.dtsi provides, as t6050-j716s.dts does: the shared temperature nodes and apple,soc-die-keys go so that discovery runs, and the fans use the T6050 mode keys F0md/F1md. The SMC (ADT /arm-io/smc) keeps driving the fans. The M5 Pro's default SSD boot has run this from its DT overlay since 2026-11-09; its Total System Power channel (PSTR) is the one the load measurements read. Signed-off-by: Diljit Singh <hey@djdev.me>
From the J714sAP ADT: hpm0 (nub-spmi-a0 0x0c, left-back) is the debug port; hpm1 (nub-spmi-a0 0x0a, left-front) sits behind ATC1 / usb-drd1; hpm2 (nub-spmi-a1 0x0c, right) behind ATC2 / usb-drd2; hpm5 (0x08) is MagSafe. There is no usb-drd3 and no nub-spmi-a2. Describe the left-front and right ports as t6050-j716s.dts does: each SN201202x with its connector graph into its dwc3 (USB2) and combo PHY (SuperSpeed), and ATC2's PHY, mailbox, controller, DARTs and power states enabled. The inventory's nub-spmi-a1 carries the generation 4 bus's three register windows and IRQ (ADT nub-spmi-a1); the driver polls the bus and refuses an interrupt, so it takes the first window only, as J716s's node does. ATC3's USB chain and nub-spmi-a2 are turned off: the board has neither. The M5 Pro's default SSD boot has run these nodes from its DT overlay since 2026-11-09: Type-C port0 and port1 with a partner, two dwc3 controllers bound. Signed-off-by: Diljit Singh <hey@djdev.me>
The SEP (ADT /arm-io/sep, iop-sep,ascwrap-v6, and dart-sep) runs from iBoot and gates its own domain. Enable its mailbox and its power state, and leave the two fabric parents (fab8-soc, fab0-piogw) to the firmware as well, so genpd votes them on and never turns them off. The boot loader enables the SEP node itself through the sep alias. The M5 Pro's default SSD boot has run this from its DT overlay since 2026-11-09, with apple_sep loaded read-only: SEP platform profile T6050/J714s, xART "writes disabled". Signed-off-by: Diljit Singh <hey@djdev.me>
Audio is not brought up on J714s. ADT i2c1 holds the left sn012776 amplifiers (audio-speaker*) and i2c2 the cs42l84 codec (audio-codec-output), so turn both buses off, as t6050-j716s.dts does. The M5 Pro's default SSD boot has run with both off since 2026-11-09. Signed-off-by: Diljit Singh <hey@djdev.me>
The J714s console is the DockChannel UART on the USB debug link (ADT /arm-io/dockchannel-uart: aapl,dock-channels, regs from 0x288e28000 and 0x288e0c000, IRQ 360), the die 0 node t6050-die0.dtsi already describes. Enable it as serial0 and the stdout path, with apple,tx-never-wait: the link drains only while a host reads it, and the machine also boots with nothing attached there. As on t6050-j716s.dts. The M5 Pro's default SSD boot has run this node from its DT overlay since 2026-11-09 (root login on ttyDC0, earlycon on the same channel). Signed-off-by: Diljit Singh <hey@djdev.me>
This was referenced Nov 10, 2026
drm/asahi: hide the teardown errors of a closing client again
arm64: dts: apple: t6050-j714s: Add the N1 Wi-Fi and Bluetooth
arm64: dts: apple: t6050-j714s: Add the SMC sensors
arm64: dts: apple: t6050-j714s: Enable the SEP's mailbox and power chain
arm64: dts: apple: t6050-j714s: Describe the two USB-C ports
arm64: dts: apple: t6050-j714s: Enable the DockChannel console
arm64: dts: apple: t6050-j714s: Add the keyboard and trackpad
arm64: dts: apple: t6050-j714s: Leave the audio I2C buses off
This was referenced Nov 10, 2026
The passive diagnostics state now carries timing and endpoint discovery fields. Supply their types in the policy extraction and their kernel primitives in the full-source sensor harness, so both still compile the real diagnostics code. Signed-off-by: Diljit Singh <hey@djdev.me>
Signed-off-by: Diljit Singh <hey@djdev.me> # Conflicts: # drivers/gpu/drm/asahi/g17/kick.rs # drivers/gpu/drm/asahi/g17/mod.rs # drivers/gpu/drm/asahi/g17/object.rs
arm64_nmi_cpu_stop calls arm64_crash_handoff_wait even when kexec is disabled. linux/kexec.h only includes the architecture header with CONFIG_KEXEC_CORE, so the SEP KUnit configuration fails with an undeclared function. Include asm/kexec.h directly to expose its existing no-op stub in that configuration. Signed-off-by: Diljit Singh <hey@djdev.me>
…ration Signed-off-by: Diljit Singh <hey@djdev.me>
The M5 stack makes the performance and region C tables optional because its firmware graph supplies them. Preserve the newer integration 25G83 profile tables as Some when combining the branches. Signed-off-by: Diljit Singh <hey@djdev.me>
DjDeveloperr
merged commit Nov 10, 2026
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Reconcile integration/aurora with the M5 GPU branch while preserving the current M3/T8122 backend. The complete
drivers/gpu/drm/asahi/m3subtree, T8122 OF tuple, configured probe arm, fullprobe_t8122()function and M3 priority-admission block remain byte-identical to the integration code. The M5 allocator exclusion and older graphs' MMIO bound and firmware timestamp-window behavior are both retained.Adapt the newer T6041 25G83 profile's performance and region-C tables to the M5 configuration's optional fields. Include the separately merged #1438 source-check prerequisite. All three CI jobs pass on
5bb2876f2ce3def3c0af8fc5a6394ee9362f0e70.The complete prepared stack is being validated on M5, with current integration ancestry folded into the ending #1012 source before freeze. That ending head receives one coordinated Neo regression; no intermediate Neo runs or new performance characterization are claimed.