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T8112: publish the CPU and ANE memory/fabric floors through the PMP report - #1571
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On T8112 the host publishes the CPU clusters' and the ANE's memory (DCS) and SoC fabric floors through the PMP report region. Describe the links: - apple,cluster-cpufreq: apple,pmp-memory-vote names the report region and the cluster's SOC-DEV-DVFS entry (0xa8 for the E cluster, 0xa9 for the P cluster). - apple,ane: apple,performance-controller is also accepted on T8112, where the ANE takes eight power domains (the last is its report entry). - apple,pmp: add the T8112 compatible and state that the board and DRAM vendor IDs come from the current boot's ADT. T8112 has no PIO table. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
The T8112 PMP takes the CPU clusters' and the ANE's DCS and SoC fabric floors from the host as one SOC-DEV-DVFS word per target, stored in the report region's update aperture: the SoC level in the main field (bits 4:0) and the DCS level in request class 0x21 (bits 35:32). The range takes these words only after its ready report (entry 8) is nonzero; the host primes the range's base entry once to ask for that report. Add apple_pmp_t8112_set_constraint(). Each target (EACC0, PACC0, ANE0) max-aggregates its sources (cpufreq, ANE) and the provider does one whole-word store when the result changes. It never waits: while the PMP is stopped or the range is not ready yet it primes the range and returns -EAGAIN, and the caller tries again later. Media entries with a performance request (AVD and JPEG under APPLE_USE_PMP) no longer fail power-on when the range is not ready: the device is admitted, its word is kept, and the word is stored as soon as the range reports ready. The debugfs status file now exists for every report provider and shows the host-written request word, the stored DVFS words, the range ready handshake and the SoC state report. KUnit covers the word layout, the not-running and not-ready paths with their later recovery, aggregation, target selection and media entry admission and release; expected words are built from the named fields. The host report-validation vectors run in run-host-tests.py, and the T6030 graph and supplier host models follow the new helpers. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
With apple,pmp-memory-vote, a T8112 cluster turns its cpufreq request into a memory (DCS) and SoC fabric floor for the PMP: the lowest quarter of the frequency range releases both floors and the upper quarters rise to DCS 4 and SoC 2. Fast-switch only records the vote and queues an irq_work, which queues the work that publishes it; queueing work directly from fast-switch can deadlock on the runqueue lock. A vote that cannot be published yet (PMP not running or not bound, DVFS range not ready) is kept and retried at most once a second from the next request. Only a request the report can never take stops the votes for the policy. Exiting the policy releases the floors. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
On T8112, with apple,performance-controller, raise the ANE target's DCS and SoC fabric floors to their highest qualified levels before each procedure call and release them 32 ms after the last one completes, so back-to-back requests do not toggle the floors. Unbind releases them. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
In the APPLE_USE_PMP profile: enable the PMP, link it to its report region, link both CPU clusters and the ANE to the report provider for their memory/fabric floors, enable the ANE and JPEG report entries, and give AVD and both JPEG codecs a "core" and a "perf" power domain. The AVD and JPEG report entries carry apple,adt-dvfs, so the bootloader fills their performance requests from this machine's ADT. The default J413 and J493 DTBs do not change. The host DT test compiles J413 with and without the profile and checks both graphs. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Document what the T6000/T8112 PMP driver reads from the device tree, what the bootloader supplies from the ADT, the APPLE_USE_PMP profile and how to qualify it. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
With apple,performance-controller the T8112 ANE has an eighth power domain, its PMP report entry. The sleep restart path looked for exactly seven domains on T8112, found none, and failed every suspend with -EOPNOTSUPP (then -EHOSTDOWN on later attempts), so s2idle never entered. Expect the eighth domain when the report provider is linked; the power cycle then releases and reasserts the report entry together with the ANE domains. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
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Replaced by #1637, which keeps these commits and adds the direct DCS/SoC floors. |
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On the M2 (T8112), the host publishes the CPU clusters' and the ANE's memory (DCS) and SoC fabric floors to the PMP. It writes one SOC-DEV-DVFS word per target into the PMP report region's update aperture. The SoC level goes in the main field (bits 4:0) and the DCS level in request class 0x21 (bits 35:32). The DVFS range accepts these words only once its ready report (entry 8) is nonzero, and the host primes the range's base entry once to ask for that report.
pmdomain: apple:apple_pmp_t8112_set_constraint(). For each target (EACC0, PACC0, ANE0) it takes the max over the cpufreq and ANE sources and writes the whole word once when the result changes. It never waits. While the PMP is stopped or the range is not ready it primes the range and returns-EAGAIN. AVD/JPEG entries with a performance request no longer fail power-on when the range isn't ready yet: the device is admitted and its word is written when the range reports ready. Every report provider now has the debugfs status file.cpufreq: apple-soc: a cluster withapple,pmp-memory-votemaps its frequency request to DCS 0/1/3/4 and SoC 0/0/1/2 by quarter of the frequency range. Fast-switch only queues an irq_work. A vote that cannot be published yet is retried at most once a second. Only-EINVAL/-EOPNOTSUPPstop the votes.accel: ane: on T8112, DCS 4 / SoC 2 are held during each procedure call and released 32 ms after the last one. With the report entry linked the ANE has eight power domains, and the sleep restart path now expects eight.arm64: dts: apple: t8112: everything stays behindAPPLE_USE_PMP. The AVD and JPEG report entries carryapple,adt-dvfs, so the bootloader fills their requests from the ADT. The default J413 and J493 DTBs are byte-identical to integration.Replaces the endpoint-command design in #1343, which the T8112 firmware does not implement.
Tests (buildbox):
apple-pmp-dvfs10/10 covers the not-running and not-ready paths and their recovery, and the expected words are built from the named fields.M2 (j413), same kernel, RAM-only trial DTBs (PMP on =
APPLE_USE_PMPplus the gfx report always on):The bootloader fills AVD as entry 0xb0 class 0x25 level 2 and JPEG as entry 0xb2 class 0x21 level 1. The CPU and ANE words reach the report: entries 0xa8/0xa9/0xab read back the top word, 0x2000000400000002. But the SoC state report (entry 9) stays 0 in every sample, and CPU memory bandwidth with the PMP on stays far below PMP off. Draft until a word that raises the SoC state is found and every row is at or above PMP off.
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