[AxxzyWasTaken]

A device tree for the MacBook Pro 16" M4 Max (J616C), on the current layout: t6041.dtsi includes t6040.dtsi, and t6041-j616c.dts uses #795's t604x-j614-j616.dtsi with the J616s board lines. Every difference was checked against a J616C ADT (macOS 26.6.2, mBoot-18000.161.10):

• CPUs: T6041 has two clusters of six P cores. t6040.dtsi gets the sixth core of each cluster (cpu@10105, cpu@10205) behind T6041_SIX_CORE_P_CLUSTERS, so t6040 DTBs don't change. The 14-core part's MPIDRs are exactly the J616s's, and aura nops the two missing nodes there by MPIDR.
• PMICs: the main PMIC is a Chapel at nub-spmi0 0xb (spmi-chapelL1-b), not an Abbey at 0xe. Its nvmem cells and RTC alarm registers (ADT info-rtc_alarm_*) are at the Abbey offsets. nub-spmi1 has a Chapel at 0xb and a Spitfire at 0x9, and nub-spmi2 has Portiers at 0xa/0xb, so the J616s's Abbeys at 0xe there go away. Nothing on nub-spmi2 has a binding yet, so that bus is left out on the J616C. An earlier test tree that kept the J616s's Abbeys logged SPMI errors at boot. This adds apple,chapel-pmic to the spmi-nvmem binding.
• Power domains: all 220 domains in t6040-pmgr.dtsi exist on the J616C at the same addresses with the same names. The J616C has 31 more (amcc16-23, dcs_16-23, prores, msr1, venc1, dispext2/3); they're left out until something uses them.
• Cache: up to eight AMCCs with four planes each, six on the binned part (ADT amcc-enable-mask 0x3f). t6041.dtsi lists the 24 planes every T6041 has, which needs soc: apple: mcc: allow up to 32 cache planes #911.
• Sensors: every SMC key the shared file's hwmon nodes and thermal zones use (TCMz, Tex0-3, Tpx0-5/8-D, the seven Tg keys, PHPC, TB0T, TCHP, TW0P, SBAV, VD0R) exists on this Mac's SMC and reads sane values. The J616C's extra GPU cluster keys can come with the GPU.
• Display, AVD, PMP, AOP, MTP, SMC, NVMe, USB: same addresses, interrupts and DART streams as the J616s.
• MTP and AOP: the board file adds aop, isp and mtp aliases, because aura opens a co-processor's DAPF only if it finds its alias. The J616C has no gp1c key: its AFE and STM resets are lines 25 and 26 of the SMC's low GPIO block, so smc_gpio_low is added here, with apple,afe-smc dropped and power method 2. It uses the plain apple,dockchannel-hid compatible, because this Mac's MTP firmware runs without the J616s's ring transport on our daily tree.
• USB3: five per-unit PHY calibration values (auspll, cio4pll, aus40cmn-shm) differ from the J616s's; the board file overrides those five properties.
• Board files: tpmtfw-j616c.bin, mesacal-j616c.bin, msrk-j616c.bin.
• Off for now: the ISP (iBoot moves its firmware from boot to boot here, so the J616s placement doesn't hold until the boot loader fills it in) and the GPU (gpu,t6041, not described yet).

@astaff: #525, #732, #749 and #805 each carry their own t6041-j616c.dts/t6041.dtsi on the older t604x.dtsi. This is meant as the shared base on the current tree. Your GPU, SEP, external display and ANE nodes could go on top of it as small board/SoC additions. Happy to adjust anything here to fit them.

Testing (J616C, 14-core M4 Max): the values here are the ones this Mac has run daily since October, from our own flattened J616C tree on a 7.2.10 kernel: the Chapel's nvmem cells (SMC RTC, reboot and poweroff), the 24 MCC planes (SLC allocation on all 24), the USB3 per-unit tunables and the board firmware names. The Chapel's alarm registers ran through our own RTC alarm code on that tree (wake from s2idle on the alarm). The apple,t6041-pmu-rtc node here hasn't run with this driver. This tree builds with the same W=1 dtc warnings as t6040-j616s.dtb, plus one unit_address_vs_reg on smc_gpio_low, which is written the same way as in t6030.dtsi.

Booted (4 Nov): this tree with #917 on top, a one-shot boot of a 7.3 kernel with aura#67 and aura#68, no desktop session. The first boot, without the last commit here, had no keyboard, trackpad or audio: RTKit timed out on the MTP and AOP. With it: the MTP firmware starts and its keyboard, multi-touch, actuator and accelerometer interfaces report ready, the AOP reports ready, and all three sound cards register (AOP HPAI, speakers, jack). NVMe (root on it), the SMC and its RTC came up. With #929 on top, the DCP binds and DRM comes up at 3456x2234 at 120 Hz, and the system level cache is enabled on all 24 MCC planes (#911). Without #929 the panel stays on simpledrm. Nobody typed on it or played sound: this is the driver log, not a hands-on test. Still failing on that boot: apple-ave (unexpected firmware segment sizes) and the ANE (firmware profile mismatch), neither from this tree. hid-apple-mtp-haptic logs hw start failed on the actuator interface.

[RyanTheTide]

Merge train (MTL, 06/11): this conflicts with integration/aurora now. A J616c device tree already landed there through astaff's series (#525/#958, then #749 for HDMI and USB-C DP and #920 for the ANE), so t6041.dtsi, t6041-j616c.dts and t6040.dtsi conflict throughout.

The parts of this PR that the merged tree doesn't have yet look worth keeping, especially the ADT-checked bits (the Chapel PMIC at nub-spmi0 0xb and its RTC cells, the six-core P clusters behind T6041_SIX_CORE_P_CLUSTERS, the spmi1/spmi2 PMIC layout, the MCC planes for #911). Could you rebase them as deltas on top of the existing J616c DT? Then #917 and #931 can stack on that. I'll run it through the train as soon as it merges cleanly.

[AxxzyWasTaken]

Closing in favour of #994, which redoes this as deltas on the merged J616C tree. The six-core clusters and the rest were already in astaff's tree, so what's left there is the Chapel PMIC with its RTC and the 24 MCC planes.